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AT75C Datasheet, PDF (155/171 Pages) ATMEL Corporation – Smart Internet Appliance Processor (SIAP)
AT75C DSP Subsystem
DPMB Semaphore
Registers
The semaphore registers look the same from the ARM and the Oak sides.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
–
OIS
AIS
Sem
• Sem: Semaphore
When low, the sender has read and write permission to the mailbox. The recipient has no permission to read or write the
associated mailbox. When high, the recipient has read and write permission to the mailbox and the sender has no
permission.
• AIS: ARM Interrupt Status
This flag indicates the value of the ARM interrupt flag. This is a read-only bit; any attempt to write to this bit will be ignored.
• OIS: Oak Interrupt Status
This flag indicates the value of the Oak interrupt flag. This is a read-only bit; any attempt to write to this bit will be ignored.
DPMB Configuration
Register (DPMBCC)
The DPMB is configured by means of a memory-mapped register that sits on the ARM
ASB bus. This register is not accessible by the Oak.
31
30
29
28
27
26
25
24
RESET
MB_CONFIG
–
–
–
–
–
23
22
21
20
19
18
17
16
OIE
15
14
13
12
11
10
9
8
AIE
7
6
5
4
3
2
1
0
ATO
• ATO[7:0]: ARM To Oak
The value of this flag conditions the semantics of semaphore operation for the associated mailbox. When high, the ARM is
the sender and the Oak is the recipient. When low, the Oak is the sender and the ARM is the recipient.
• AIE[15:8]: ARM Interrupt Enable
• When high, appropriate semaphore operations can raise an interrupt to the ARM. When low, interrupts are never raised
by any semaphore operation.
• OIE[23:16]: Oak Interrupt Enable
When high, appropriate semaphore operations can raise an interrupt to the ARM. When low, interrupts are never raised by
any semaphore operation.
• MB_CONFIG[30:29]: Mailbox Configuration
Selects one of four possible mailbox configurations. Refer to Table 10.
• RESET
When a high is written to this bit, the DPMB is reset to its initial state, ready for the configuration to be set.
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