U5021M Datasheet, PDF (4/11 Pages) ATMEL Corporation – DIGITAL WINDOW WATCHDOG TIMER

Figure 3. Period t versus R₁, at C₁ = 500 pF
1000.00
100.00
t (µs)
10.00
1.00
1
10
Figure 4. Power-on Reset and Switch-over Mode
VDD
t₀
Reset Out
Mode
R₁ (kΩ)
C₁ = 500 pF
100
4.5 V
5.0 V
5.5 V
1000
Pin 6
t₆
Pin 5
t₁
Pin 3
Supply Voltage
Monitoring, Pin 5
During ramp-up of the supply voltage and in the case of supply-voltage drops the inte-
grated power-on reset (POR) circuitry sets the internal logic to a defined basic status
and generates a reset pulse at the reset output, pin 5. A hysteresis in the POR threshold
prevents the circuit from oscillating. During ramp-up of the supply voltage, the reset out-
put stays active for a specified period of time (t₀) in order to bring the microcontroller into
its defined reset status (see Figure 4). Pin 5 has an open-drain output.
Switch-over Mode Time,
Pin 3
The switch-over mode time enables the synchronous operation of microcontroller and
watchdog. When the power-on reset time has elapsed, the watchdog has to be switched
to monitoring mode by the microcontroller by a “low” signal transmitted to the mode pin
(pin 3) within the time-out period, t₁. If the low signal does not occur within t₁ (see Figure
4), the watchdog generates a reset pulse, t₆, and t₁ starts again. Microcontroller and
watchdog are synchronized with the switch-over mode time, t₁, each time a reset pulse
is generated.
4 U5021M
4756C–AUTO–09/04