U5021M Datasheet, PDF (3/11 Pages) ATMEL Corporation – DIGITAL WINDOW WATCHDOG TIMER

U5021M
Pin Description
Pin
Symbol
1
WAKE-UP
2
TRIG
3
MODE
4
ENA
5
RESET
6
VDD
7
GND
8
OSC
Function
Wake-up input (pull-down resistor)
There is one digitally debounced wake-up input. During the long watchdog window, each signal slope at
the input initiates a reset pulse at pin 5.
Trigger input (pull-up resistor)
It is connected to the microprocessor’s trigger signal.
Mode input (pull-up resistor)
The processor’s mode signal initiates the switchover between the long and the short watchdog time.
Enable output (push-pull)
It is used for the control of peripheral components. It is activated after the processor triggers three times
correctly.
Reset output (open drain)
Resets the processor in the case of a trigger error or if a wake-up pulse occurs during the long watchdog
period.
Supply voltage
Ground, reference voltage
RC oscillator
Functional
Description
Supply Voltage, Pin 6
RC Oscillator, Pin 8
The U5021M requires a stabilized supply voltage V_DD = 5 V ±5% to comply with its elec-
trical characteristics.
An external buffer capacitor of C = 10 nF may be connected between pin 6 and GND.
The clock frequency, f, can be adjusted by the components R₁ and C₁ according to the
formula:
f = ¹--
t
where t = 1.35 + 1.57 R₁ (C₁ + 0.01)
R₁ in kΩ, C₁ in nF and t in µs
The clock frequency determines all time periods of the logic part as shown in the table
“Electrical Characteristics” under the subheading “Timing” on page 9. With an appropri-
ate component selection, the clock frequency, f, is nearly independent of the supply
voltage as shown in Figure 3 on page 4.
Frequency tolerance ∆f_max = 10% with R₁ ±1%, C₁ = ±5%
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