U5020M Datasheet, PDF (4/10 Pages) TEMIC Semiconductors – Digital Window Watchdog Timer

Figure 3. Period t versus R₁, at C₁ = 500 pF
1000.00
100.00
t (µs)
10.00
1.00
1
10
Figure 4. Power-up Reset and Mode Switchover
V_DD
t₀
Reset out
Mode
C₁ = 500 pF
100
R₁ (kΩ)
t₁
4.5 V
5.0 V
5.5 V
1000
Pin 13
t₆
Pin 10
Pin 12
Supply Voltage
Monitoring, Pin 10
The integrated power-on reset (POR) circuitry sets the internal logic to a defined basic
status and generates a reset pulse at the reset output, pin 10, during ramp-up of the
supply voltage and in the case of voltage drops of the supply. A hysteresis in the POR
threshold prevents the circuit from oscillating. During ramp-up of the supply voltage, the
reset output stays active for a specified period of time (t₀) in order to bring the microcon-
troller in its defined reset status (see Figure 4). Pin 10 has an open-drain output.
Switch-over Mode Time,
Pin 12
The switch-over mode time enables the synchronous operation of microcontroller and
watchdog. When the power-up reset time has elapsed, the watchdog has to be switched
to monitoring mode by the microcontroller by a “low” signal transmitted to the mode pin
(pin 12) within the time-out period, t₁. If the low signal does not occur within t₁, (see Fig-
ure 4) the watchdog generates a reset pulse, t₆, and the time, t₁, starts again.
Microcontroller and watchdog are synchronized with the switchover mode time, t₁, each
time a reset pulse is generated.
4 U5020M
4755A–AUTO–11/03