U5020M Datasheet, PDF (2/10 Pages) TEMIC Semiconductors – Digital Window Watchdog Timer

Figure 1. Block Diagram with External Ciruit
R₁
V_DD
OSC 15
RC
C₁
Oscillator
Reset 10
C
V_DD
10 nF
13
Micro-
controller
Input t_{s 16}
Trigger 11
Mode ₁₂
OSC
Input signal
conditioning
POR
Power-on
reset
Wake up ^3-8
14
GND
OSC
State machine
9
External
switching
Enable circuitry
POR _{Test logic}
2
1
Test Test
Pin Configuration
Figure 2. Pinning SO16
TM ¹
TM 2
WAKE-UP 3
WAKE-UP 4
WAKE-UP 5
WAKE-UP 6
WAKE-UP 7
WAKE-UP 8
16 TS
15 OSC
14 GND
13 VDD
12 MODE
11 TRIG
10 RESET
9 ENA
2 U5020M
4755A–AUTO–11/03