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ATMEGA128RFR2_14 Datasheet, PDF (343/611 Pages) ATMEL Corporation – Microcontroller with Low Power
21.4 Counter Unit
ATmega256/128/64RFR2
"Asynchronous Operation of Timer/Counter2" on page 352. For details on clock sources
and prescaler, see section "Timer/Counter Prescaler" on page 355.
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter
unit. Figure 21-2 below shows a block diagram of the counter and its surrounding
environment.
Figure 21-2. Counter Unit Block Diagram
Signal description (internal signals):
count
Increment or decrement TCNT2 by 1.
direction
Selects between increment and decrement.
clear
Clear TCNT2 (set all bits to zero).
clkTn
Timer/Counter clock, referred to as clkT2 in the following.
top
Signalizes that TCNT2 has reached maximum value.
bottom
Signalizes that TCNT2 has reached minimum value (zero).
Depending on the mode of operation used, the counter is cleared, incremented, or
decremented at each timer clock (clkT2). clkT2 can be generated from an external or
internal clock source, selected by the Clock Select bits (CS22:0). When no clock source
is selected (CS22:0 = 0) the timer is stopped. However, the TCNT2 value can be
accessed by the CPU, regardless of whether clkT2 is present or not. A CPU write
overrides (has priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits
located in the Timer/Counter Control Register (TCCR2A) and the WGM22 located in the
Timer/Counter Control Register B (TCCR2B). There are close connections between
how the counter behaves (counts) and how waveforms are generated on the Output
Compare outputs OC2A and OC2B. For more details about advanced counting
sequences and waveform generation, see chapter "Modes of Operation" below.
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation
selected by the WGM22:0 bits. TOV2 can be used for generating a CPU interrupt.
21.5 Modes of Operation
The mode of operation, i.e., the behaviour of the Timer/Counter and the Output
Compare pins, is defined by the combination of the Waveform Generation mode
(WGM22:0) and Compare Output mode (COM2x1:0) bits. The Compare Output mode
bits do not affect the counting sequence, while the Waveform Generation mode bits do.
The COM2x1:0 bits control whether the PWM output generated should be inverted or
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