AT91SAM7S64_05 Datasheet, PDF (335/491 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

AT91SAM7S64 Preliminary
30.8.2 SSC Clock Mode Register
Name:
SSC_CMR
Access Type:
Read/Write
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
DIV
7
6
5
4
3
2
1
0
DIV
• DIV: Clock Divider
0: The Clock Divider is not active.
Any Other Value: The Divided Clock equals the Master Clock divided by 2 times DIV. The maximum bit rate is MCK/2. The
minimum bit rate is MCK/2 x 4095 = MCK/8190.
6070B–ATARM–25-Feb-05
335