AT91SAM7X256 Datasheet, PDF (282/637 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers

30.5.4
Read/Write Flowcharts
The following flowcharts shown in Figure 30-10 and in Figure 30-11 on page 283 give examples
for read and write operations in Master Mode. A polling or interrupt method can be used to check
the status bits. The interrupt method requires that the interrupt enable register (TWI_IER) be
configured first.
Figure 30-10. TWI Write in Master Mode
START
Set TWI clock:
TWI_CWGR = clock
Set the control register:
- Master enable
TWI_CR = MSEN
Set the Master Mode register:
- Device slave address
- Internal address size
- Transfer direction bit
Write ==> bit MREAD = 0
TWI_THR = data to send
Internal address size = 0?
Yes
Load transmit register
TWI_THR = Data to send
Start the transfer
TWI_CR = START
Read status register
TXRDY = 0?
Set theinternal address
TWI_IADR = address
Yes
Data to send?
Yes
Stop the transfer
TWI_CR = STOP
Read status register
TXCOMP = 0?
Yes
END
282 AT91SAM7X256/128 Preliminary
6120D–ATARM–02-Feb-06