 English |
|
|
|
|
|
|
|
| ATMEGA649 Datasheet, PDF (255/375 Pages) ATMEL Corporation – 8-bit Microcontroller with In-System Programmable Flash | |||
| |||
| ◁ |
ATmega329/3290/649/6490
ATmega329/3290/649/6490 Boundary-scan Order
Table 113 and Table 114 shows the Scan order between TDI and TDO when the
Boundary-scan chain is selected as data path. Bit 0 is the LSB; the first bit scanned in,
and the first bit scanned out. The scan order follows the pin-out order as far as possible.
Therefore, the bits of Port A is scanned in the opposite bit order of the other ports.
Exceptions from the rules are the Scan chains for the analog circuits, which constitute
the most significant bits of the scan chain regardless of which physical pin they are con-
nected to. In Figure 110, PXn. Data corresponds to FF0, PXn. Control corresponds to
FF1, and PXn. Pull-up_enable corresponds to FF2. Bit 4, 5, 6 and 7 of Port F is not in
the scan chain, since these pins constitute the TAP pins when the JTAG is enabled.
Table 113. ATmega329/649 Boundary-scan Order, 64-pin
Bit Number Signal Name
Module
197
AC_IDLE
Comparator
196
ACO
195
ACME
194
AINBG
193
COMP
ADC
192
ACLK
191
ACTEN
190
PRIVATE_SIGNAL1(1)
189
ADCBGEN
188
ADCEN
187
AMPEN
186
DAC_9
185
DAC_8
184
DAC_7
183
DAC_6
182
DAC_5
181
DAC_4
180
DAC_3
179
DAC_2
178
DAC_1
177
DAC_0
176
EXTCH
175
GNDEN
174
HOLD
173
IREFEN
172
MUXEN_7
171
MUXEN_6
170
MUXEN_5
2552HâAVRâ11/06
255
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese