AT90PWM1_14 Datasheet, PDF (176/297 Pages) ATMEL Corporation – Advanced RISC Architecture

18. Analog Comparator
The Analog Comparator compares the input values on the positive pin ACMPx and negative pin
ACMPM.
18.1 Overview
The AT90PWM1 features three fast analog comparators.
Each comparator has a dedicated input on the positive input, and the negative input can be con-
figured as:
• a steady value among the 4 internal reference levels defined by the Vref selected thanks to
the REFS1:0 bits in ADMUX register.
• a value generated from the internal DAC
• an external analog input ACMPM.
When the voltage on the positive ACMPn pin is higher than the voltage selected by the ACnM
multiplexer on the negative input, the Analog Comparator output, ACnO, is set.
The comparator is a clocked comparator. A new comparison is done on the falling edge of
CLK_I/O or CLK_I/O/2 ( Depending on ACCKDIV fit of ACSR register, See “Analog Comparator Sta-
tus Register – ACSR” on page 179.).
Each comparator can trigger a separate interrupt, exclusive to the Analog Comparator. In addi-
tion, the user can select Interrupt triggering on comparator output rise, fall or toggle.
The interrupt flags can also be used to synchronize ADC or DAC conversions.
Moreover, the comparator’s output of the comparator 1 can be set to trigger the Timer/Counter1
Input Capture function.
A block diagram of the three comparators and their surrounding logic is shown in Figure 18-1.
176 AT90PWM1
4378C–AVR–09/08