AT32UC3L064_2 Datasheet, PDF (165/830 Pages) ATMEL Corporation – 32-bit AVR® Microcontroller

AT32UC3L016/32/64
13.7 User Interface
Table 13-6. PM Register Memory Map
Offset
Register
0x000
Main Clock Control
0x004
CPU Clock Select
0x008
HSB Clock Select
0x00C
PBA Clock Select
0x010
PBB Clock Select
0x014 - 0x01C
Reserved
0x020
CPU Mask
0x024
HSB Mask
0x028
PBA Mask
0x02C
PBB Mask
0x030- 0x03C
Reserved
0x040
PBA Divided Mask
0x044 - 0x050
Reserved
0x054
Clock Failure Detector Control
0x058
Unlock Register
0x05C - 0x0BC
Reserved
0x0C0
PM Interrupt Enable Register
0x0C4
PM Interrupt Disable Register
0x0C8
PM Interrupt Mask Register
0x0CC
PM Interrupt Status Register
0x0D0
PM Interrupt Clear Register
0x0D4
Status Register
0x0D8 - 0x15C
Reserved
0x160
Peripheral Power Control Register
0x164 - 0x17C
Reserved
0x180
Reset Cause Register
0x184
Wake Cause Register
0x188
Asyncronous Wake Enable
0x18C - 0x3F4
Reserved
0x3F8
Configuration Register
0x3FC
Version Register
Register Name
MCCTRL
CPUSEL
HSBSEL
PBASEL
PBBSEL
CPUMASK
HSBMASK
PBAMASK
PBBMASK
PBADIVMASK
CFDCTRL
UNLOCK
IER
IDR
IMR
ISR
ICR
SR
PPCR
RCAUSE
WCAUSE
AWEN
CONFIG
VERSION
Access
Read/Write
Read/Write
Read-only
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Write-only
Write-only
Write-only
Read-only
Read-only
Write-only
Read-only
Read/Write
Read-only
Read-only
Read/Write
Read-only
Read-only
Reset
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000003
0x0000007F
0x03FFFFFF
0x00000007
0x0000007F
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000002
-⁽²⁾
-⁽³⁾
0x00000000
0x00000043
-⁽¹⁾
Note:
1. The reset value is device specific. Please refer to the Module Configuration section at the end of this chapter.
2. Latest Reset Source.
3. Latest Wake Source.
32099D–06/2010
165