ATMEGA324P_14 Datasheet, PDF (155/377 Pages) ATMEL Corporation – Nonvolatile Program and Data Memories

ATmega164P/324P/644P
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting. Table 15-5 shows the COM2B1:0 bit functionality when the WGM22:0 bits
are set to a normal or CTC mode (non-PWM).
Table 15-5.
COM2B1
0
0
1
1
Compare Output Mode, non-PWM Mode
COM2B0 Description
0
Normal port operation, OC2B disconnected.
1
Toggle OC2B on Compare Match
0
Clear OC2B on Compare Match
1
Set OC2B on Compare Match
Table 15-6 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
mode.
Table 15-6.
COM2B1
0
0
1
1
Compare Output Mode, Fast PWM Mode⁽¹⁾
COM2B0 Description
0
Normal port operation, OC2B disconnected.
1
Reserved
0
Clear OC2B on Compare Match, set OC2B at BOTTOM,
(non-inverting mode).
1
Set OC2B on Compare Match, clear OC2B at BOTTOM,
(inverting mode).
Note:
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See “Fast PWM Mode” on
page 146 for more details.
Table 15-7 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
rect PWM mode.
Table 15-7.
COM2B1
0
0
1
1
Compare Output Mode, Phase Correct PWM Mode⁽¹⁾
COM2B0 Description
0
Normal port operation, OC2B disconnected.
1
Reserved
0
Clear OC2B on Compare Match when up-counting. Set OC2B on
Compare Match when down-counting.
1
Set OC2B on Compare Match when up-counting. Clear OC2B on
Compare Match when down-counting.
Note:
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on
page 148 for more details.
• Bits 3:2 – Res: Reserved Bits
These bits are reserved bits in the ATmega164P/324P/644P and will always read as zero.
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