ATMEGA324P_14 Datasheet, PDF (108/377 Pages) ATMEL Corporation – Nonvolatile Program and Data Memories

13.9.5 OCR0B – Output Compare Register B
13.9.6
Bit
0x28 (0x48)
Read/Write
Initial Value
7
6
5
4
3
2
1
0
OCR0B[7:0]
OCR0B
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0B pin.
TIMSK0 – Timer/Counter Interrupt Mask Register
Bit
7
6
5
4
3
2
1
0
(0x6E)
–
–
–
–
–
OCIE0B OCIE0A TOIE0
TIMSK0
Read/Write
R
R
R
R
R
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bits 7:3 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bit 2 – OCIE0B: Timer/Counter Output Compare Match B Interrupt Enable
When the OCIE0B bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter Compare Match B interrupt is enabled. The corresponding interrupt is executed if
a Compare Match in Timer/Counter occurs, i.e., when the OCF0B bit is set in the Timer/Counter
Interrupt Flag Register – TIFR0.
• Bit 1 – OCIE0A: Timer/Counter0 Output Compare Match A Interrupt Enable
When the OCIE0A bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Compare Match A interrupt is enabled. The corresponding interrupt is executed
if a Compare Match in Timer/Counter0 occurs, i.e., when the OCF0A bit is set in the
Timer/Counter 0 Interrupt Flag Register – TIFR0.
13.9.7
• Bit 0 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
When the TOIE0 bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Overflow interrupt is enabled. The corresponding interrupt is executed if an
overflow in Timer/Counter0 occurs, i.e., when the TOV0 bit is set in the Timer/Counter 0 Inter-
rupt Flag Register – TIFR0.
TIFR0 – Timer/Counter 0 Interrupt Flag Register
Bit
7
6
5
4
3
2
1
0
0x15 (0x35)
–
–
–
–
–
OCF0B OCF0A
TOV0
TIFR0
Read/Write
R
R
R
R
R
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bits 7:3 – Res: Reserved Bits
These bits are reserved bits in the ATmega164P/324P/644P and will always read as zero.
108 ATmega164P/324P/644P
7674F–AVR–09/09