EVLB001 Datasheet, PDF (15/35 Pages) ATMEL Corporation – Automatic microcontroller dimmable ballast

Section 5
Device Design & Application
5.1 Magnetics
PFC – Power Factor Correction
Without going into the derivations of the formulae used, the inductor design is as
follows:
L = 1.4 * 90VAC * 25µS = 700µH
4.5A peak
The ON time has been discussed earlier and the OFF time maximum will occur at high
line condition at the peak of the haversine. A 16mm core was chosen for the recom-
mended power density at 200mT and 50 kHz.
5.2 IXYS
The IXYS IXTP02N50D depletion mode MOSFET is used in this circuit to provide power
IXTP02N50D
and a start-up voltage to the Vcc pin of the IXI859 charge pump regulator. The
DEPLETION
MODE MOSFET
USED AS
CURRENT
IXTP02N50D acts as a current source and self regulates as the source voltage rises
above the 15V zener voltage and causes the gate to become more negative than the
source due to the voltage drop across the source resistor (R2). Enough energy is avail-
able from the current source circuit during the conduction angles to keep the IXI859 (U1)
pin 1 greater than 14VDC as required to enable the Under Voltage Lock Out (UVLO) cir-
SOURCE
cuitry in the IXI859.
5.3 IXYS IXD611
The IXD611 half bridge driver includes two independent high speed drivers capable of
Half- bridge
600mA drive current at a supply voltage of 15V. The isolated high side driver can with-
MOSFET driver
stand up to 650V on its output while maintaining its supply voltage through a bootstrap
diode configuration. In this ballast application, the IXD611 is used in a half bridge
inverter circuit driving two IXYS IXTP3N50P power MOSFETs. The inverter load con-
sists of a series resonant inductor and capacitor to power the lamps. Filament power is
also provided by the load circuit and is wound on the same core as the resonant induc-
tor. Pulse width modulation (PWM) is not used in this application, instead the power is
varied and the dimming of the lamps is controlled through frequency variation. It is
important to note that pulse overlap, which could lead to the destruction of the two MOS-
FETs due to current shoot through, is prevented via the input drive signals through the
microcontroller(500nS deadtimes).
ATAVRFBKIT / EVLB001 User Guide
5-13
7597B–AVR–10/07