AT89C5131A-M_14 Datasheet, PDF (149/188 Pages) ATMEL Corporation – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode

AT89C5130A/31A-M
Table 21-15. UEPIEN Register
UEPIEN (S:C2h)
USB Endpoint Interrupt Enable Register
7
6
5
4
3
2
1
-
EP6INTE EP5INTE EP4INTE EP3INTE EP2INTE EP1INTE
Bit
Bit Number Mnemonic Description
7
-
Reserved
The value read from this bit is always 0. Do not set this bit.
Endpoint 6 Interrupt Enable
6
EP6INTE Set this bit to enable the interrupts for this endpoint.
Clear this bit to disable the interrupts for this endpoint.
Endpoint 5 Interrupt Enable
5
EP5INTE Set this bit to enable the interrupts for this endpoint.
Clear this bit to disable the interrupts for this endpoint.
Endpoint 4 Interrupt Enable
4
EP4INTE Set this bit to enable the interrupts for this endpoint.
Clear this bit to disable the interrupts for this endpoint.
Endpoint 3 Interrupt Enable
3
EP3INTE Set this bit to enable the interrupts for this endpoint.
Clear this bit to disable the interrupts for this endpoint.
Endpoint 2 Interrupt Enable
2
EP2INTE Set this bit to enable the interrupts for this endpoint.
Clear this bit to disable the interrupts for this endpoint.
Endpoint 1 Interrupt Enable
1
EP1INTE Set this bit to enable the interrupts for this endpoint.
Clear this bit to disable the interrupts for this endpoint.
Endpoint 0 Interrupt Enable
0
EP0INTE Set this bit to enable the interrupts for this endpoint.
Clear this bit to disable the interrupts for this endpoint.
Reset Value = 00h
0
EP0INTE
4337K–USB–04/08
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