AT89C5131A-M_14 Datasheet, PDF (119/188 Pages) ATMEL Corporation – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode

4337K–USB–04/08
AT89C5130A/31A-M
Bit
Bit Number Mnemonic Description
1
SD1
Address bit 1 or Data bit 1.
0
SD0
Address bit 0 (R/W) or Data bit 0.
Table 20-12. SSCS (094h) Read - Synchronous Serial Control and Status Register
7
6
5
4
3
2
1
0
SC4
SC3
SC2
SC1
SC0
0
0
0
Bit
Bit Number Mnemonic Description
0
0
Always zero
1
0
Always zero
2
0
Always zero
3
SC0
Status Code bit 0
See Table 20-5 to Table 20-9
Status Code bit 1
4
SC1
See Table 20-5 to Table 20-9
5
SC2
Status Code bit 2
See Table 20-5 to Table 20-9
6
SC3
Status Code bit 3
See Table 20-5 to Table 20-9
7
SC4
Status Code bit 4
See Table 20-5 to Table 20-9
Table 20-13. SSADR (096h) - Synchronous Serial Address Register (read/write)
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Bit
Bit Number Mnemonic Description
7
A7
Slave address bit 7.
6
A6
Slave address bit 6.
5
A5
Slave address bit 5.
4
A4
Slave address bit 4.
3
A3
Slave address bit 3.
2
A2
Slave address bit 2.
1
A1
Slave address bit 1.
General call bit
0
GC
Clear to disable the general call address recognition.
Set to enable the general call address recognition.
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