ATMEGA256RFR2_14 Datasheet, PDF (145/611 Pages) ATMEL Corporation – Microcontroller with Low Power

ATmega256/128/64RFR2
Table 9-76 AACK_FVN_MODE Register Bits
Register Bits
Value
Description
AACK_FVN_MODE1:0
0
Acknowledge frames with version number 0
1
Acknowledge frames with version number 0
or 1
2
Acknowledge frames with version number 0
or 1 or 2
3
Acknowledge frames independent of frame
version number
• Bit 5 – AACK_SET_PD - Set Frame Pending Sub-field
The content of AACK_SET_PD bit is copied into the frame pending subfield of the
acknowledgment frame if the acknowledgment is the answer to a data request MAC
command frame. If in addition the bits AACK_FVN_MODE of this register are
configured to accept frames with a frame version other than 0 or 1, the content of
register bit AACK_SET_PD is also copied into the frame pending subfield of the
acknowledgment frame for any MAC command frame with a frame version of 2 or 3 that
have the security enabled subfield set to 1. This is done in the assumption that a future
version of the IEEE 802.15.4 standard might change the length or structure of the
auxiliary security header, so that it is not possible to safely detect whether the MAC
command frame is actually a data request command or not.
• Bit 4 – AACK_DIS_ACK - Disable Acknowledgment Frame Transmission
If this bit is set no acknowledgment frames are transmitted in RX_AACK Extended
Operating Mode even if requested.
• Bit 3 – AACK_I_AM_COORD - Set Personal Area Network Coordinator
This register bit has to be set if the node is a PAN coordinator. It is used for address
filtering in RX_AACK.
• Bit 2:0 – CSMA_SEED_12:10 - Seed Value for CSMA Random Number
Generator
These bits contain the bits [10:8] of the CSMA_SEED. The lower part is defined in
register CSMA_SEED_0. See register CSMA_SEED_0 for details.
9.12.53 CSMA_BE – Transceiver CSMA-CA Back-off Exponent Control Register
Bit
NA ($16F)
Read/Write
Initial Value
Bit
NA ($16F)
Read/Write
Initial Value
7
MAX_BE3
RW
0
3
MIN_BE3
RW
0
6
MAX_BE2
RW
1
2
MIN_BE2
RW
0
5
MAX_BE1
RW
0
1
MIN_BE1
RW
1
4
MAX_BE0
RW
1
0
MIN_BE0
RW
1
CSMA_BE
CSMA_BE
This register controls the back-off exponent for the CSMA-CA procedure.
• Bit 7:4 – MAX_BE3:0 - Maximum Back-off Exponent
These register bits define the maximum back-off exponent used in the CSMA-CA
algorithm to generate a pseudo random number for back off the CCA. For details refer
to IEEE 802.15.4-2006, section 7.5.1.4. Valid values are 3 to 8.
8393C-MCU Wireless-09/14
145