AT91SAM7S128C-AU-999 Datasheet, PDF (136/775 Pages) ATMEL Corporation – ARM-based Flash MCU

20.3
Serial Fast Flash Programming
The Serial Fast Flash programming interface is based on IEEE Std. 1149.1 “Standard Test Access Port and
Boundary-Scan Architecture”. Refer to this standard for an explanation of terms used in this chapter and for a
description of the TAP controller states.
In this mode, data read/written from/to the embedded Flash of the device are transmitted through the JTAG inter-
face of the device.
20.3.1 Device Configuration
In Serial Fast Flash Programming Mode, the device is in a specific test mode. Only a distinct set of pins is signifi-
cant. Other pins must be left unconnected.
Figure 20-7. Serial Programming
VDDIO
VDDIO
VDDIO
GND
TDI
TDO
TMS
TCK
TST
PGMEN0
PGMEN1
PGMEN2
VDDCORE
VDDIO
VDDPLL
VDDFLASH
GND
0-50MHz
XIN
Table 20-20. Signal Description List
Signal Name
VDDFLASH
VDDIO
VDDCORE
VDDPLL
GND
XIN
Function
Type
Power
Flash Power Supply
Power
I/O Lines Power Supply
Power
Core Power Supply
Power
PLL Power Supply
Power
Ground
Ground
Clocks
Main Clock Input.
This input can be tied to GND. In this
case, the device is clocked by the internal
RC oscillator.
Input
Active
Level Comments
32 kHz to 50 MHz
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
136