AT91C140_05 Datasheet, PDF (131/174 Pages) ATMEL Corporation – AT91 ARM Thumb Microcontrollers

20.6.4 TC Channel Mode Register: Capture Mode
Register Name:
TC_CMR
Access Type:
Read/Write
31
30
29
28
–
–
–
–
23
22
21
20
–
–
–
–
15
14
13
12
WAVE
CPCTRG
–
–
7
LDBDIS
6
LDBSTOP
5
4
BURST
• TCCLKS: Clock Selection
TCCLKS
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Clock Selected
ACLK/2
ACLK/8
ACLK/32
ACLK/128
ACLK/1024
XC0
XC1
XC2
• CLKI: Clock Invert
0 = Counter is incremented on rising edge of the clock.
1 = Counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
BURST
0
0
0
1
1
0
1
1
The clock is not gated by an external signal.
XC0 is ANDed with the selected clock.
XC1 is ANDed with the selected clock.
XC2 is ANDed with the selected clock.
• LDBSTOP: Counter Clock Stopped with RB Loading
0 = Counter clock is not stopped when RB loading occurs.
1 = Counter clock is stopped when RB loading occurs.
• LDBDIS: Counter Clock Disable with RB Loading
0 = Counter clock is not disabled when RB loading occurs.
1 = Counter clock is disabled when RB loading occurs.
AT91C140
27
–
19
11
–
3
CLKI
26
–
18
LDRB
10
ABETRG
2
25
24
–
–
17
16
LDRA
9
8
ETRGEDG
1
0
TCCLKS
6069C–ATARM–15-Sep-05
131