IC-LV_16 Datasheet, PDF (11/15 Pages) IC-Haus GmbH – 5-BIT OPTO ENCODER

iC-LV
5-BIT OPTO ENCODER
Rev C1, Page 11/15
Modes Of Operation
iC-LV has various modes of operation which are pres-
elected using pin MODE. MODE = 0 selects operation
as an optoelectronic encoder IC with a parallel output;
MODE = 1 (default) makes a number of serial operating
modes available.
Parallel Output Mode (MODE = 0)
In parallel output mode the 5 tracks with sensor D4
(MSB) to sensor D0 (LSB or least significant bit) are
output in parallel to pins SYNM1 (LSB), SYNM0, SCLK,
SERIN and SOUT (MSB).
The wiring of pin NDIR determines the count direction.
With NDIR connected to GND the MSB is output in-
verted so that the count direction can be altered when
reading Gray-coded discs.
By connecting pin NINV to GND the output of all bits
can be inverted. If this is not required, NINV can be
left open. NDIR and NINV can be used either together
or independently of one another. If both pins are con-
nected to GND all bits - with the exception of the MSB -
are output inverted.
By connecting pin SEEN to GND the bits can be output
in binary format following a Gray to binary code con-
version. This is done after the bits have been inverted,
where relevant. If pin SEEN is left unconnected the
output is in Gray code.
Serial Output Mode (MODE = 1, default)
In serial output mode pin SCLK is the clock input
hooked up to an SSI master supplying an intermittently
active clock signal with a high level during idle time, pin
SERIN is the serial data input and pin SOUT the serial
data output.
Various serial operational modes and output formats
can be configured using pins SYNM0 and SYNM1 (high
when not wired).
SEEN. In No Sync Binary mode pin SEEN has no
function.
In both No Sync and No Sync Binary mode iC-LV op-
erates without synchronization, i.e. it stores the 5 track
values on the first falling edge seen at SCLK after a
long idle time and then transmits the track data via pin
SOUT on each of the 5 following rising edges at SCLK.
At the same time pin SERIN reads in data from a pre-
positioned iC-LV which can then be passed on. Here,
iC-LV operates as a 5-bit shift register (or 6-bit if the
error bit is active during No Sync mode) whose flipflops
accept input data on a falling edge and output stored
data on a rising edge.
In No Sync Binary mode data is converted from Gray
to binary before being output. In this mode of operation
it is not possible to output a serial error bit; no data from
SERIN is accepted on the first and second rising edge
at SCLK.
If pin NDIR is connected to GND a change in count
direction with Gray codes can be initiated by inverting
the MSB. By connecting pin NINV to GND all track data
can be output inverted. Both pins NINV and NDIR are
high when not connected.
In modes SSI out and Sync Out iC-LV operates with
synchronization, classing the LSB of its own code disc
as a synchronization bit. The data read in from the
code disc is converted into binary code and, if neces-
sary, corrected by +1 or -1 depending on the MSB of
the pre-positioned device also read in.
Each LSB has the same resolution as the MSB of the
pre-positioned iC-LV, operated at a 16-fold faster speed,
and is assembled so that it either trails (SEEN is high,
default) or leads (SEEN is low) by up to 90°. The
phase position must be configured for each individual
code disc using pin SEEN (trail/lead). This phase shift
applies to data converted into binary code and is not
immediately visible on the code discs.
SYNM(1:0)
Code
Serial Op. Modes
11
No Sync (default)
10
No Sync Binary
01
Sync Out
00
SSI Out
Data Output Format
5 bit Gray
(option: +1 error bit)
5 bit binary
4 bit binary
(corrected by +/- 1 bit)
4 bit binary
(corrected by +/- 1 bit)
Table 5: Serial Operating Modes
In No Sync mode an LED control error bit (low active)
can be added to the serial data by releasing it via pin
If data is read out serially and synchronized elsewhere
a smaller phase shift must be adjusted. In this instance
data transmission times must be taken into account.
The synchronization process ensures that synchronous
with the flipping of the MSB from the pre-positioned
iC-LV track data is switched forward to the next data
word expected on that code disc. Once the track data
has been captured on the first falling edge at SLCK,
the data word is synchronized with the MSB of the pre-
decessor during the first low and first high period on
the SCLK line (the MSB is possibly subject to change
within this time).