AAT2860 Datasheet, PDF (12/23 Pages) Advanced Analogic Technologies – Backlight/Flash LED Driver and Multiple LDO Lighting Management Unit

PRODUCT DATASHEET
AAT2860
ChargePump^TM Backlight/Flash LED Driver and Multiple LDO Lighting Management Unit
the LED off, the safety timer insures that the LED or
other circuitry is not damaged.
Both the backlight and flash LED currents are programmed
through the I²C compatible serial interface as are the
backlight fade timer, the flash safety timer, and the torch/
flash inhibit current levels. See the “I²C Compatible Serial
Interface” section of this datasheet for more information
on setting the LED currents. To enable the flash LED(s),
strobe both LED_SEL and FL_LVL inputs low-to-high. As
long as FL_LVL signal is held high, the flash LED remains
on unless it is on longer than the safety timer period. If
this occurs, the flash LED is turned off.
LDO Regulators
The AAT2860-x family include three LDO regulators. These
regulators are powered from the battery and produce a
fixed output voltage set through the I²C compatible serial
interface. The output voltage can be set to one of 16 out-
put voltages between 1.5V and 3.0V. The LDOs can also be
turned on/off through the I²C compatible serial interface.
The LDO regulators require only a small 2.2μF ceramic
output capacitor for stability. If improved load transient
response is required, larger-valued capacitors can be
used without stability degradation.
I²C Compatible Serial Interface
The AAT2860-x uses an I²C serial interface to set the LED
currents, the flash timer period, the LDO on/off and out-
put voltage, as well as other housekeeping functions. The
I²C interface takes input from a master device while the
AAT2860-x acts as a target to the master. The I²C protocol
uses two open-drain inputs; SDA (serial data line) and
SCL (serial clock line). Both inputs require an external pull
up resistor, typically to the input voltage. The I²C protocol
is bidirectional and allows target devices and masters to
both read and write to the bus. AAT2860 only supports
the write protocol and therefore the Read/Write bit must
always be set to “0”. The timing diagram in Figure 1 below
shows the typical transmission protocol.
I²C Compatible Serial Interface Protocol
The I²C compatible serial interface protocol is shown in
Figure 1. Devices on the bus can be either master or
target devices. Both master and target devices can both
send and receive data over the bus, with the difference
being that the master device controls all communication
on the bus. The AAT2860-x acts as a target device on the
bus and is only capable of receiving data and does not
transmit data over the bus.
The I²C communications begin with the master generat-
ing a START condition. Next, the master transmits the
7-bit device address and a read/write bit. Each target
device on the bus has a unique address. If the address
transmitted by the master matches the device address,
the target device transmits an acknowledge (ACK) signal
to indicate that it is ready to receive data. Since the
AAT2860-x only reads from the master, the read/write
bit must be set to “0”. Next, the master transmits an
8-bit register address, and the target device transmits
an ACK to indicate that it has received the register
address. Next, the master transmits an 8-bit data word,
and again the target device transmits an ACK indicating
that it has received the data. This process continues until
the master is finished writing to the target device at
which time the master generates a STOP condition.
START and STOP Conditions
START and STOP conditions are always generated by the
master. Prior to initiating a START, both the SDA and SCL
pin are active. As shown in Figure 2, a START condition is
when the master pulls the SDA line low and, after the
START condition hold time (t_{HD_STA}), the master strobes the
SCL line low. A START condition acts as a signal to devices
on the bus that the device producing the START condition
is active and will be communicating on the bus.
SCL
SDA
Start
AAT 2860 Device
Address 0x60
W ACK Address = 02h ACK
Data = 40h
ACK Stop
Figure 1: Typical I²C Timing Diagram.
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2860.2008.05.1.0