AAT1171 Datasheet, PDF (12/22 Pages) Advanced Analogic Technologies – 600mA Voltage-Scaling Step-Down Converter for RF Power Amplifiers with Bypass Switch

AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
Functional Block Diagram
VOUT
VCC
VIN
DAC
EN
BYPASS
MODE/SYNC
Comp
DH
Error
Amp
Logic
LX
DL
MODE/SYNC
Interface
Functional Description
The AAT1171 is a 600mA 2MHz peak current mode
synchronous step-down (buck) converter designed
to operate from a single-cell lithium-ion battery with
a 2.7V to 4.2V input range. The output voltage is
dynamically programmed by the DAC input voltage.
To maximize converter efficiency over all load con-
ditions, the converter automatically transitions to a
variable frequency light load (LL) mode when the
load is less than 100mA. When combined with the
very low quiescent current, the LL mode maintains
a high efficiency over the complete load range. For
noise sensitive applications, the converter can be
forced into a fixed frequency PWM mode.
Provisions are also made for synchronization of the
converter to an external system clock.
The synchronous buck converter power output
devices are sized at 230mΩ for a 600mA full load
output current. In addition to the converter output,
an additional low resistance bypass MOSFET
(85mΩ) can be connected between the battery
input and the converter output (V_IN to V_OUT),
12
AGND PGND
bypassing the converter and output inductor to
improve headroom and extend the WCDMA PA full
power range. This reduces the battery voltage nec-
essary for a WCDMA RF power amplifier to meet
linearity requirements, thus extending operating
time. In dual mode systems, the bypass mode may
also be used when the WCDMA RF power amplifi-
er is in GSM mode. Bypass mode is activated by
setting the bypass input high or by forcing the
baseband DAC output voltage to 1.3V.
The AAT1171 requires only three external compo-
nents for operation (C_IN, C_OUT, L_X). The high 2MHz
switching frequency reduces the inductor size
required to 2.2µH. This reduces the DC resistance
and improves the converter efficiency while mini-
mizing the inductor footprint and height. The output
voltage of the converter is regulated to within 0.5%
and will settle in less than 30µs (according to
WCDMA specifications) in response to any step
change in the DAC input.
Under-voltage lockout, internal compensation, soft-
start, over-current, and over-temperature protec-
tion are also included.
1171.2006.06.1.0