ALT6725 Datasheet, PDF (8/13 Pages) ANADIGICS, Inc – HELP3E Dual-band Cellular & PCS LTE 3.4 V Linear Power Amplifier Module

ALT6725
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site: http://
www.anadigics.com along with Figure 3, which shows
the recommended ON/OFF timing sequence for RFIN,
control voltages, and supply voltages.
Shutdown Mode
The power amplifier may be placed in a shutdown
mode by applying logic low levels (see Operating
Ranges table) to the VENABLE and VMODE pads.
Bias Modes
The power amplifier may be placed in Low, Medium,
or High Bias modes by applying the appropriate logic
level (see Operating Ranges table) to the VMODE pin.
The Bias Control table lists the recommended modes
of operation for various applications.
Vcontrols
Venable/Vmode(s)
On Sequence Start
T_0N =0µ
ON Sequence
Rise/Fall Max 1µS
Defined at 10% to 90%
of Min/Max Voltage
Off Sequence Start
T_0FF= 0µ
OFF Sequence
RFIN_CELL, PCS
notes 1,2
VEN_CELL, PCS
VCC/VCCA
note 1
T_0N+1µS
T_0N+3 µS
T_0FF+2µS T_0FF+3µS
Referenced After 90% of Rise
Time
Referenced Before10% of Fall
Time
Figure 3: Recommended ON/OFF Timing Sequence
Notes:
(1) Level might be changed after RF is ON.
(2) RF OFF defined as PIN ≤ -30 dBm.
(3) Switching simultaneously between VMODE and VEN is not recommended.
Table 8: Bias Control
APPLICATION
POUT
LEVELS
BIAS
MODE
VEN_CELL
VEN_PCS
VMODE1
VMODE2
VCC
Low Bias Mode
< +9 dBm
Low +1.8 V +1.8 +1.8 V 0.8 - 4.35 V
Medium Bias Mode
> +9 dBm
< +15 dBm
Medium
+1.8 V
+1.8 V
0V
0.8 - 4.35 V
High Bias Mode
> +15 dBm High +1.8 V 0 V
0 V 1.3 - 4.35 V
Shutdown
8
-
Shutdown 0 V
0V
0 V 3.2 - 4.35 V
PRELIMINARY DATA SHEET - Rev 1.0
07/2012
VBATT
> 3.2 V
> 3.2 V
> 3.2 V
> 3.2 V