A49LF040 Datasheet, PDF (20/31 Pages) AMIC Technology – 4 Mbit CMOS 3.3Volt-only Low Pin Count Flash Memory

A/A MUX MODE AC CHARACTERISTICS
Table 20: Read Cycle Timing Parameters V_DD=3.0-3.6V
Symbol
T_RC
T_RST
T_AS
T_AH
T_AA
T_OE
T_OLZ
T_OHZ
T_OH
Parameter
Read Cycle Time
RST# High to Row Address Setup
R/C# Address Set-up Time
R/C# Address Hold Time
Address Access Time
Output Enable Access Time
OE# Low to Active Output
OE# High to High-Z Output
Output Hold from Address Change
A49LF040
Min
Max
Units
270
ns
1
µs
45
ns
45
ns
120
ns
60
ns
0
ns
35
ns
0
ns
Table 21: Program/Erase Cycle Timing Parameters, V_DD=3.0-3.6V
Symbol
Parameter
Min
Max
Units
T_RST
T_AS
T_AH
T_CWH
T_OES
T_OEH
T_OEP
T_OET
T_WP
T_WPH
T_DS
T_DH
T_IDA
T_BP
T_BE
T_SCE
RST# High to Row Address Setup
R/C# Address Setup Time
R/C# Address Hold Time
R/C# to Write Enable High Time
OE# High Setup Time
OE# High Hold Time
OE# to Data# Polling Delay
OE# to Toggle Bit Delay
WE# Pulse Width
WE# Pulse Width High
Data Setup Time
Data Hold Time
Product ID Access and Exit Time
Byte Programming Time
Block Erase Time
Chip Erase Time
1
µs
50
ns
50
ns
50
ns
20
ns
20
ns
40
ns
40
ns
100
ns
100
ns
50
ns
5
ns
150
ns
300
µs
8
s
10
s
Table 22: Reset Timing Parameters, V_DD=3.0-3.6V
Symbol ^Parameter
Min
Max
T_PRST
T_RSTP
T_RSTF
T_RST(1)
T_RSTE
V_DD Stable to Reset Low
RST# Pulse Width
RST# Low to Output Float
RST# High to LFRAME# Low
RST# Low to Reset During Erase or Program
1
100
48
1
10
1. There will be a reset latency of TRSTE if a reset procedure is performed during a Program or Erase operation.
Units
ms
ns
ns
µs
µs
PRELIMINARY (August, 2004, Version 0.1)
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AMIC Technology, Corp.