A49LF040 Datasheet, PDF (15/31 Pages) AMIC Technology – 4 Mbit CMOS 3.3Volt-only Low Pin Count Flash Memory

Operating Range
Range
Ambient Temperature
Commercial
0°C to +85°C
V_DD
3.0-3.6V
A49LF040
AC Conditions of Test
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . 3ns
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . CL = 30pF
Table 12: DC Operating Characteristics (All Interfaces)
Symbol Parameter
Limits
Min
Max Units
Test Conditions
Active V_DD Current:
Read
I_DD
Active V_DD Current:
Write⁽¹⁾
12
mA ^{Address Input=VIL/VIH, at F=1/TRCMin, VDD=VDDMax(A/A}
Mux Mode)
OE#=V_IH, WE#=V_IH
24
mA
I_SB
I_RY(2)
I_I
Standby V_DD Current
(LPC Mode)
Ready Mode V_DD Current
(LPC Mode)
Input Current for Mode
and ID[3:0] Pins
100
µA ^{LFRAME#=0.9VDD,f=33MHz,VDD=VDDMax, All other}
inputs ≥ 0.9V_DD or ≤ 0.1V_DD
10
mA ^{LFRAME#=VIL,f=33MHz,VDD=VDDMax, All other inputs ≥}
0.9V_DD or ≤ 0.1V_DD
100
µA ^{VIN=GND to VDD, VDD=VDDMax}
I_LI
I_LO
V_IHI(3)
V_ILI(3)
V_IH
V_IL
V_OL
V_OH
Input Leakage Current
Output Leakage Current
INIT# Input High Voltage
INIT# Input Low Voltage
Input High Voltage
Input Low Voltage
Output Low Voltage
Output High Voltage
1.0
-0.5
0.5V_DD
-0.5
0.9V_DD
1
1
V_DD+0.5
0.4
V_DD+0.5
0.3V_DD
0.1V_DD
µA V_IN=GND to V_DD, V_DD=V_DDMax
µA V_OUT=GND to V_DD, V_DD=V_DDMax
V V_DD=V_DDMax
V V_DD=V_DDMin
V V_DD=V_DDMax
V V_DD=V_DDMin
V IOL=1500µA, V_DD=V_DDMin
V IOH=-500µA, V_DD=V_DDMin
Notes:
1. I_DD active while Erase or Program is in progress.
2. The device is in Ready Mode when no activity is on the LPC bus.
3. Do not violate processor or chipset specification regarding INIT# voltage.
Table 13: Recommended System Power-Up Timings
Symbol
Parameter
Min
Units
T_PU-READ(1)
Power-up to Read Operation
100
µs
T_PU-WRITE(1)
Power-up to Write Operation
100
µs
Notes:
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
PRELIMINARY (August, 2004, Version 0.1)
14
AMIC Technology, Corp.