PI331MC-DR Datasheet, PDF (6/9 Pages) AMI SEMICONDUCTOR – 300DPI CIS Two Level Digital Output Module

Integration time
Operating temperature
Tint
600⁽³⁾
Top
25
ms
50
0_C
Note:
(1) The clock frequency and the integration times must be fixed at the factory.
However, it will tolerate a slight deviation in clock frequency and integration
time as indicated by the minimum and maximum clock speeds.
(2) Clock pulse high is specified at 2.0 MHz at 25% duty.
(3) The Tint is specified with a 2.0 MHz clock frequency. In operation the time
constants in the reference generator is set to match the initial exposure time,
hence the time constant will determine the optimum integration time.
Accordingly it is highly recommended that the parameters adjusted at factory for
the specific applications.
Switching Characteristics (25°C)
The switching characteristics for the I/O clocks are shown in Figure 4, Module Timing
Diagram. The timing parametric values and their symbols are given in the Table 4.
CP
tprh
SP
to
tdh
tds
Vanalog
tsh
tddl
Digout
tw
tdl
tdodl
MODULE TIMING DIAGRAM
FIGURE 4.
Table 4. Switching Parameter and Timing Symbol Definition
Clock cycle time
Clock pulse width
Clock duty cycle
Prohibit crossing time
of Start Pulse
Data setup time
Data hold time
Symbol
to
tw
tprh
tds
tdh
Min.
100
25
15
20
20
Typical
0.50
Max.
50
PAGE 6 OF 9 - PI331MC-DR, 11-8-00
Units
µs
ns
%
ns
ns
ns