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AMIS-40616 Datasheet, PDF (4/17 Pages) AMI SEMICONDUCTOR – LIN Transceiver with 5V Voltage Regulator
AMIS-40616
LIN Transceiver with 5V Voltage Regulator
Data Sheet
6.0 Typical Application
6.1 Application Schematic
The EMC immunity of the master-mode device can be further enhanced by adding a capacitor between the LIN output and ground. The
optimum value of this capacitor is determined by the length and capacitance of the LIN bus, the number and capacitance of slave
devices, the pull-up resistance of all devices (master & slave), and the required time constant of the system, respectively.
Vcc voltage must be properly stabilized by external capacitors: capacitor of min. 80nF (ESR<10mΩ) in parallel with a capacitor of min.
8µF (ESR<1Ω).
VBAT
LIN
WAKE
GND
10 uF 100nF
Master Node
10 uF 100nF
VBB
VCC
VCC
INH 1
11
14 RxD
13
TxD
LIN 2 AMIS- 12
40616 9
Micro
EN controller
5
WAKE 7 3
10
4 11 8
STB
GND
GND
VBAT
LIN
WAKE
GND
10 uF 100nF
Slave Node
10 uF 100nF
VBB
VCC
VCC
1
14 RxD
11
13
TxD
LIN 2 AMIS- 12
40616 9
Micro
EN controller
5
WAKE 7 3
4 11
10
8
STB
GND
GND
KL30
LIN-BUS
KL31
Figure 2: Typical Application Diagram
6.2 Pin Description
6.2.1. Pin Out (top view)
VBB 1
LIN 2
GND 3
GND 4
WAKE 5
INH 6
OTP_ZAP 7
14 VCC
13 RxD
12 TxD
11 GND
10 STB
9 EN
8 TEST
PC20060426.1
Figure 3: Pin Configuration
AMI Semiconductor – January 2007, M-20545-001
4
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