AMIS-30521 Datasheet, PDF (13/26 Pages) AMI SEMICONDUCTOR – Micro-stepping Motor Driver

AMIS-30521 Micro-stepping Motor Driver
Data Sheet
8.4 Programmable Peak-Current
The amplitude of the current waveform in the motor coils (coil peak current = Imax) is adjusted by means of an SPI parameter
"CUR[4:0]" (Table 13: SPI Control Register 0). Whenever this parameter is changed, the coil-currents will be updated immediately at
the next PWM period. More information can be found in Table 24: SPI Control Parameter Overview CUR[4:0].
8.5 Speed and Load Angle Output
The SLA-pin provides an output voltage that indicates the level of the Back-e.m.f. voltage of the motor. This Back-e.m.f. voltage is
sampled during every so-called "coil current zero crossings". Per coil, two zero-current positions exist per electrical period, yielding in
total four zero-current observation points per electrical period.
I_COIL
V_BEMF
t
Previous
Micro-step
I_COIL
ZOOM
Coil Current Zero Crossing
Current Decay
Zero Current
Next
Micro-step
t
V_COIL
VBB
Voltage Transient
V_BEMF
Figure 12: Principle of Bemf Measurement
t
PC20070604.7
Because of the relatively high recirculation currents in the coil during current decay, the coil voltage V_COIL shows a transient behavior.
As this transient is not always desired in application software, two operating modes can be selected by means of the bit <SLAT> (see
"SLA-transparency" in Table 15: SPI Control Register 2). The SLA pin shows in "transparent mode" full visibility of the voltage transient
behavior. This allows a sanity-check of the speed-setting versus motor operation and characteristics and supply voltage levels. If the bit
“SLAT” is cleared, then only the voltage samples at the end of each coil current zero crossing are visible on the SLA-pin. Because the
transient behavior of the coil voltage is not visible anymore, this mode generates smoother Back e.m.f. input for post-processing, e.g.
by software.
In order to bring the sampled Back e.m.f. to a descent output level (0 to 5V), the sampled coil voltage V_COIL is divided by 2 or by 4. This
divider is set through an SPI bit <SLAG>. (Table 15: SPI Control Register 2)
Table 12: Parameter Table SLA Pin
Symbol
Pin(s) Parameter
V_out
Output voltage range
V_off
Output offset the SLA pin
R_out
C_load
SLA ^{Output resistance SLA pin}
Load capacitance SLA pin
G_sla
Gain of SLA pin = V_BEMF / V_COIL
Remark/Test Conditions
0.2V < Vsla < Vdd - 0,2V
SLAG=0
SLAG=1
Min.
0.5
-20
Typ.
0,5
0,25
Max.
Unit
4.5
V
20
mV
1
kΩ
50
pF
AMI Semiconductor – June 2007, M-20683-001
13
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