AMIS-39101 Datasheet, PDF (10/15 Pages) AMI SEMICONDUCTOR – Octal High-Side Driver with Protection

AMIS-39101: Octal High-Side Driver with Protection
Data Sheet
Table 11: Digital Characteristics
Symbol
Description
Min.
Max.
Unit
T_CLK
Maximum applied clock frequency on CLK input
500
kHz
T_DATA_ready
Time between falling edge on WR and first bit of data ready on
2
µs
DOUT output
(driver going from HZ state to output of first diagnostic bit)
T_CLK_first
T_setup⁽¹⁾
T_hold⁽¹⁾
First clock edge from falling edge on WR
Setup time on DIN
Hold time on DIN
3
µs
20
ns
20
ns
T_DATA_next
Time between rising edge on CLK and next bit ready on DOUT (capa
100
ns
on DOUT is 30pF max.)
T_SPI_END
Time between last CLK edge and WR rising edge
1
µs
T_risefall
Rise and fall time of all applied signals
5
20
ns
(maximum loading capacitance is 30pF)
T_WR
Time between two rising edge on WR
300
µs
(repetition of the same command)
Note:
(1) Guaranteed by design
Normal mode verification:
• The command is the set of eight bits loaded via SPI, which drives the eight HS drivers on or off.
• The command is activated with rising edge on WR pin.
Table 12: Digital Characteristics
Symbol
T_command_L_max.⁽¹⁾
T_command_R⁽¹⁾
T_PDB_recov
Note:
(1) Guaranteed by design
Description
Min. Max. Unit
Minimum time between two opposite commands for inductive
1
loads and maximum HS driver current of 275mA
Minimum time between two opposite commands for resistive
2
loads and maximum HS driver current of 350mA
The time between the rising edge on the PDB input and 90
percent of VS-1V on all HS driver outputs. (all drivers are
activated, pure resistive load 35mA on all outputs)
s
ms
1
ms
AMI Semiconductor – November 06 - M-20638-001
10
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