AM29DL400B_05 Datasheet, PDF (5/47 Pages) Advanced Micro Devices – 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

TABLE OF CONTENTS
Product Selector Guide .......................................... 4
Block Diagram......................................................... 4
Connection Diagrams ............................................. 5
Connection diagramS ............................................. 6
Pin Description........................................................ 7
Logic Symbol .......................................................... 7
Ordering Information .............................................. 8
Device Bus Operations........................................... 9
Table 1. Am29DL400B Device Bus Operations ................................9
Word/Byte Configuration .......................................................... 9
Requirements for Reading Array Data ..................................... 9
Writing Commands/Command Sequences .............................. 9
Simultaneous Read/Write Operations with Zero
Latency ................................................................................... 10
Standby Mode ........................................................................ 10
Automatic Sleep Mode ........................................................... 10
RESET#: Hardware Reset Pin ............................................... 10
Output Disable Mode .............................................................. 11
Table 2. Am29DL400BT Top Boot Sector
Architecture .....................................................................................11
Table 3. Am29DL400BB Bottom Boot Sector
Architecture .....................................................................................12
Autoselect Mode ..................................................................... 12
Table 4. Am29DL400B Autoselect Codes (High Voltage Method) ..13
Sector Protection/Unprotection ............................................... 13
Temporary Sector Unprotect .................................................. 13
Figure 1. Temporary Sector Unprotect Operation........................... 13
Figure 2. In-System Sector Protect/Unprotect
Algorithms ....................................................................................... 14
Hardware Data Protection ...................................................... 15
Low VCC Write Inhibit ............................................................ 15
Write Pulse “Glitch” Protection ............................................... 15
Logical Inhibit .......................................................................... 15
Power-Up Write Inhibit ............................................................ 15
Command Definitions ........................................... 15
Reading Array Data ................................................................ 15
Reset Command ..................................................................... 15
Autoselect Command Sequence ............................................ 15
Byte/Word Program Command Sequence ............................. 16
Unlock Bypass Command Sequence ..................................... 16
Figure 3. Program Operation .......................................................... 17
Chip Erase Command Sequence ........................................... 17
Sector Erase Command Sequence ........................................ 17
Erase Suspend/Erase Resume Commands ........................... 18
Figure 4. Erase Operation............................................................... 19
Command Definitions ........................................... 20
Table 5. Am29DL400B Command Definitions ................................20
Write Operation Status ......................................... 21
DQ7: Data# Polling ................................................................. 21
Figure 5. Data# Polling Algorithm ................................................... 21
RY/BY#: Ready/Busy# ............................................................ 21
DQ6: Toggle Bit I .................................................................... 22
DQ2: Toggle Bit II ................................................................... 22
Reading Toggle Bits DQ6/DQ2 ............................................... 22
Figure 6. Toggle Bit Algorithm........................................................ 23
DQ5: Exceeded Timing Limits ................................................ 23
DQ3: Sector Erase Timer ....................................................... 23
Table 6. Write Operation Status ..................................................... 24
Absolute Maximum Ratings................................. 25
Figure 7. Maximum Negative Overshoot Waveform ..................... 25
Figure 8. Maximum Positive Overshoot Waveform....................... 25
Operating Ranges ................................................. 26
DC Characteristics................................................ 27
CMOS Compatible .................................................................. 27
Figure 9. I_CC1 Current vs. Time (Showing Active
and Automatic Sleep Currents) ...................................................... 28
Figure 10. Typical I_CC1 vs. Frequency ........................................... 28
Test Conditions..................................................... 29
Figure 11. Test Setup.................................................................... 29
Table 7. Test Specifications ........................................................... 29
Key to Switching Waveforms .................................................. 29
Figure 12. Input Waveforms and Measurement
Levels............................................................................................. 29
AC Characteristics................................................ 30
Read-Only Operations ........................................................... 30
Figure 13. Read Operation Timings ............................................... 30
Figure 14. Reset Timings ............................................................... 31
Figure 15. BYTE# Timings for Read Operations............................ 32
Figure 16. BYTE# Timings for Write Operations............................ 32
Figure 17. Program Operation Timings.......................................... 34
Figure 18. Chip/Sector Erase Operation Timings .......................... 34
Figure 19. Back-to-Back Read/Write Cycle Timings ...................... 35
Figure 20. Data# Polling Timings (During Embedded Algorithms). 35
Figure 21. Toggle Bit Timings (During Embedded Algorithms)...... 36
Figure 22. DQ2 vs. DQ6................................................................. 36
Figure 23. Temporary Sector Unprotect Timing
Diagram.......................................................................................... 37
Figure 24. Sector Protect/Unprotect Timing
Diagram.......................................................................................... 38
Alternate CE# Controlled Erase/Program
Operations .............................................................................. 39
Figure 25. Alternate CE# Controlled Erase/Program
Operation Timings.......................................................................... 40
Erase and Programming Performance ............... 41
Latchup Characteristics ....................................... 42
TSOP and SO Pin Capacitance............................ 42
Data Retention....................................................... 42
Physical Dimensions*........................................... 43
TS 048—48-Pin Standard TSOP ............................................ 43
TSR048—48-Pin Reverse TSOP ........................................... 44
SO 044—44-Pin Small Outline ............................................... 45
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 46
Am29DL400B
3