EP1S30F780C6 Datasheet, PDF (861/864 Pages) Altera Corporation – Stratix Device Handbook, Volume 1

Designing with 1.5-V Devices
Table 14–8. Voltage Regulator Selection Process for EP1C12F324C Design (Part 2 of 2)
EP1C12 maximum power-up current requirement
See Power Consumption section of the Cyclone FPGA Family
Data Sheet for other densities
Maximum output current required
Compare I_{C C} with I_{P U C ( M A X )}
Voltage regulator selection
See Linear Technology LTC 1649 data sheet
See Intersil (Elantec) EL7562C data sheet
LTC1649
I_{P U C ( M A X )} = 900 mA
I_{O U T ( M A X )} = 900 mA
LTC1649 I_{O U T ( M A X )} = 15 A
EL7562C I_{O U T ( M A X )} = 2 A
Nominal efficiency (η)
Nominal efficiency (η) = > 90%
Line and load regulation
Line regulation + load regulation = (0.17 mV + 7 mV)/ 1.5 V × 100%
Line and Load
Regulation = 0.478% < 5%
Minimum input voltage (V_IN(MIN))
(V_IN(MIN)) = V_IN(1 – ΔV_IN) = 3.3V(1 – 0.05)
Maximum input current
I_{IN, DC(MAX)} = (V_OUT × I_OUT(MAX))/(η× V_IN(MIN))
(V_IN(MIN)) = 3.135 V
I_{IN, DC(MAX)} = 478 mA < 2 A
EL7562C
Nominal efficiency (η)
Nominal efficiency (η) = > 95%
Line and load regulation
Line regulation + load regulation = (0.17 mV + 7 mV)/ 1.5 V × 100%
Line and Load
Regulation = 0.5% < 5%
Minimum input voltage (V_IN(MIN))
(V_IN(MIN)) = V_IN(1 – ΔV_IN) = 3.3V(1 – 0.05)
(V_IN(MIN)) = 3.135 V
Maximum input current
I_{IN, DC(MAX)} = (V_OUT × I_OUT(MAX))/(η× V_IN(MIN))
I_{IN, DC(MAX)} = 453 mA < 2 A
Board Layout
Laying out a printed circuit board (PCB) properly is extremely important
in high-frequency (≥100 kHz) switching regulator designs. A poor PCB
layout results in increased EMI and ground bounce, which affects the
reliability of the voltage regulator by obscuring important voltage and
current feedback signals. Altera recommends using Gerber files ⎯pre-
designed layout files⎯supplied by the regulator vendor for your board
layout.
If you cannot use the supplied layout files, contact the voltage regulator
vendor for help on re-designing the board to fit your design requirements
while maintaining the proper functionality.
Altera recommends that you use separate layers for signals, the ground
plane, and voltage supply planes. You can support separate layers by
using multi-layer PCBs, assuming you are using two signal layers.
Altera Corporation
January 2005
14–21
Stratix Device Handbook, Volume 2