EPM7064QC100-15 Datasheet, PDF (64/66 Pages) Altera Corporation – Programmable Logic Device Family

MAX 7000 Programmable Logic Device Family Data Sheet
Revision
History
The information contained in the MAX 7000 Programmable Logic Device
Family Data Sheet version 6.7 supersedes information published in
previous versions. The following changes were made in the MAX 7000
Programmable Logic Device Family Data Sheet version 6.7:
Version 6.7
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.7:
■ Reference to AN 88: Using the Jam Language for ISP & ICR via an
Embedded Processor has been replaced by AN 122: Using Jam STAPL for
ISP & ICR via an Embedded Processor.
Version 6.6
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.6:
■ Added Tables 6 through 8.
■ Added “Programming Sequence” section on page 17 and
“Programming Times” section on page 18.
Version 6.5
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.5:
■ Updated text on page 16.
Version 6.4
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.4:
■ Added Note (5) on page 28.
Version 6.3
The following changes were made in the MAX 7000 Programmable Logic
Device Family Data Sheet version 6.3:
■ Updated the “Open-Drain Output Option (MAX 7000S Devices
Only)” section on page 20.
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Altera Corporation