EPM7256AETC100-10N Datasheet, PDF (48/64 Pages) Altera Corporation – Programmable Logic Device Family

MAX 7000A Programmable Logic Device Data Sheet
Table 26. EPM7512AE Internal Timing Parameters (Part 2 of 2) Note (1)
Symbol
Parameter
t_IC
t_EN
t_GLOB
t_PRE
t_CLR
t_PIA
t_LPA
Array clock delay
Register enable time
Global control delay
Register preset time
Register clear time
PIA delay
Low-power adder
Conditions
(2)
(6)
Speed Grade
Unit
-7
-10
-12
Min Max Min Max Min Max
1.8
2.3
2.9 ns
1.0
1.3
1.7 ns
1.7
2.2
2.7 ns
1.0
1.4
1.7 ns
1.0
1.4
1.7 ns
3.0
4.0
4.8 ns
4.5
5.0
5.0 ns
48
Altera Corporation