EPM240G Datasheet, PDF (40/86 Pages) Altera Corporation – MAX II Device Family

2–32
Chapter 2: MAX II Architecture
Referenced Documents
Connect VCCIO pins to either a 1.5-V, 1.8 V, 2.5-V, or 3.3-V power supply, depending
on the output requirements. The output levels are compatible with systems of the
same voltage as the power supply (that is, when VCCIO pins are connected to a 1.5-V
power supply, the output levels are compatible with 1.5-V systems). When VCCIO
pins are connected to a 3.3-V power supply, the output high is 3.3 V and is compatible
with 3.3-V or 5.0-V systems. Table 2–7 summarizes MAX II MultiVolt I/O support.
Table 2–7. MAX II MultiVolt I/O Support (Note 1)
Input Signal
Output Signal
VCCIO (V) 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V
1.5
v
v
v
v
—
v
—
—
—
—
1.8
v
v
v
v
—
v (2)
v
—
—
—
2.5
—
—
v
v
—
v (3) v (3)
v
—
—
3.3
—
—
v (4)
v
v (5) v (6) v (6) v (6)
v
v (7)
Notes to Table 2–7:
(1) To drive inputs higher than V_CCIO but less than 4.0 V including the overshoot, disable the I/O clamp diode. However, to drive 5.0-V inputs to the
device, enable the I/O clamp diode to prevent V_I from rising above 4.0 V.
(2) When V_CCIO = 1.8 V, a MAX II device can drive a 1.5-V device with 1.8-V tolerant inputs.
(3) When V_CCIO = 2.5 V, a MAX II device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.
(4) When V_CCIO = 3.3 V and a 2.5-V input signal feeds an input pin, the VCCIO supply current will be slightly larger than expected.
(5) MAX II devices can be 5.0-V tolerant with the use of an external resistor and the internal I/O clamp diode on the EPM1270 and EPM2210
devices.
(6) When V_CCIO = 3.3 V, a MAX II device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.
(7) When V_CCIO = 3.3 V, a MAX II device can drive a device with 5.0-V TTL inputs but not 5.0-V CMOS inputs. In the case of 5.0-V CMOS, open-
drain setting with internal I/O clamp diode (available only on EPM1270 and EPM2210 devices) and external resistor is required.
f For information about output pin source and sink current guidelines, refer to the AN
428: MAX II CPLD Design Guidelines.
Referenced Documents
This chapter referenced the following documents:
■ AN 428: MAX II CPLD Design Guidelines
■ DC and Switching Characteristics chapter in the MAX II Device Handbook
■ Hot Socketing and Power-On Reset in MAX II Devices chapter in the MAX II Device
Handbook
■ Using User Flash Memory in MAX II Devices chapter in the MAX II Device Handbook
MAX II Device Handbook
© October 2008 Altera Corporation