5CEBA5F23C7N Datasheet, PDF (36/58 Pages) Altera Corporation – Cyclone V Device Datasheet

Page 36
Switching Characteristics
Figure 9 shows the timing diagram for RGMII TX timing characteristics.
Figure 9. RGMII TX Timing Diagram
TX_CLK
TX_D[3:0]
T_d
TX_CTL
Table 40 lists the RGMII RX timing characteristics for Cyclone V devices.
Table 40. RGMII RX Timing Requirements for Cyclone V Devices—Preliminary
Symbol
Description
T_clk (1000Base-T)
T_clk (100Base-T)
T_clk (10Base-T)
T_su
T_h
RX_CLK clock period
RX_CLK clock period
RX_CLK clock period
RX_D/RX_CTL setup time
RX_D/RX_CTL hold time
Min
Typ
Max
Unit
TBD
8
TBD
ns
TBD
40
TBD
ns
TBD
400
TBD
ns
1
—
TBD
ns
1
—
TBD
ns
Figure 10 shows the timing diagram for RGMII RX timing characteristics.
Figure 10. RGMII RX Timing Diagram
RX_CLK
RX_D[3:0]
RX_CTL
T_su
T_h
Table 41 lists the management data input/output (MDIO) timing characteristics for
Cyclone V devices.
Table 41. MDIO Timing Requirements for Cyclone V Devices—Preliminary
Symbol
Description
Min
Typ
Max
Unit
T_clk
MDC clock period
T_d
MDC to MDIO output data delay
T_s
Setup time for MDIO data
T_h
Hold time for MDIO data
TBD
400
TBD
ns
10
—
TBD
ns
10
—
TBD
ns
10
—
TBD
ns
Cyclone V Device Datasheet
June 2013 Altera Corporation