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EP4CE15F23C6N Datasheet, PDF (23/42 Pages) Altera Corporation – This section lists the I/O leakage current, pin capacitance, on-chip termination (OCT) tolerance, and bus hold specifications for Cyclone IV devices.
Chapter 1: Cyclone IV Device Datasheet
Switching Characteristics
1–23
Table 1–23 lists the Cyclone IV GX transceiver block AC specifications.
Table 1–23. Transceiver Block AC Specification for Cyclone IV GX Devices (1), (2)
Symbol/
Description
Conditions
C6
C7, I7
C8
Unit
Min Typ Max Min Typ Max Min Typ Max
PCIe Transmit Jitter Generation (3)
Total jitter at 2.5 Gbps
(Gen1)
Compliance pattern — — 0.25 — — 0.25 — — 0.25 UI
PCIe Receiver Jitter Tolerance (3)
Total jitter at 2.5 Gbps
(Gen1)
Compliance pattern
> 0.6
> 0.6
> 0.6
UI
GIGE Transmit Jitter Generation (4)
Deterministic jitter
(peak-to-peak)
Pattern = CRPAT
Total jitter (peak-to-peak) Pattern = CRPAT
— — 0.14 — — 0.14 — — 0.14 UI
— — 0.279 — — 0.279 — — 0.279 UI
GIGE Receiver Jitter Tolerance (4)
Deterministic jitter
tolerance (peak-to-peak)
Pattern = CJPAT
> 0.4
Combined deterministic
and random jitter
Pattern = CJPAT
tolerance (peak-to-peak)
> 0.66
Notes to Table 1–23:
(1) Dedicated refclk pins were used to drive the input reference clocks.
(2) The jitter numbers specified are valid for the stated conditions only.
(3) The jitter numbers for PIPE are compliant to the PCIe Base Specification 2.0.
(4) The jitter numbers for GIGE are compliant to the IEEE802.3-2002 Specification.
> 0.4
> 0.66
> 0.4
UI
> 0.66
UI
Core Performance Specifications
The following sections describe the clock tree specifications, PLLs, embedded
multiplier, memory block, and configuration specifications for Cyclone IV Devices.
Clock Tree Specifications
Table 1–24 lists the clock tree specifications for Cyclone IV devices.
Table 1–24. Clock Tree Performance for Cyclone IV Devices (Part 1 of 2)
Performance
Device
C6
C7
C8
C8L (1)
C9L (1)
EP4CE6
500
437.5
402
362
265
EP4CE10
500
437.5
402
362
265
EP4CE15
500
437.5
402
362
265
EP4CE22
500
437.5
402
362
265
EP4CE30
500
437.5
402
362
265
EP4CE40
500
437.5
402
362
265
I7
437.5
437.5
437.5
437.5
437.5
437.5
I8L (1)
362
362
362
362
362
362
Unit
A7
402 MHz
402 MHz
402 MHz
402 MHz
402 MHz
402 MHz
December 2013 Altera Corporation
Cyclone IV Device Handbook,
Volume 3