EP5357XUI Datasheet, PDF (2/19 Pages) Altera Corporation – 600mA PowerSoC Synchronous Buck Regulator With Integrated Inductor

Ordering Information
Part Number
Comment
Package
EP5357LUI
LOW VID Range 16-pin QFN T&R
EP5357HUI
HIGH VID Range 16-pin QFN T&R
EVB-EP5357LUI EP5357LUI Evaluation Board
EVB-EP5357HUI EP5357HUI Evaluation Board
EP5357LUI/EP5357HUI
Pin Assignments (Top View)
NC(SW) 1
PGND 2
LLM 3
VFB 4
VSENSE 5
AGND 6
16 15
78
14 PVIN
13 AVIN
12 ENABLE
11 VS0
10 VS1
9 VS2
Figure 3: EP5357LUI Pin Out Diagram (Top View)
NC(SW) 1
PGND 2
LLM 3
NC 4
VSENSE 5
AGND 6
16 15
78
14 PVIN
13 AVIN
12 ENABLE
11 VS0
10 VS1
9 VS2
Pin Description
Figure 4: EP5357HUI Pin Out Diagram (Top View)
PIN
1, 15,
16
2
3
4
5
03409
NAME
NC(SW)
PGND
LLM
VFB/NC
VSENSE
FUNCTION
NO CONNECT – These pins are internally connected to the common switching node of the
internal MOSFETs. NC (SW) pins are not to be electrically connected to any external signal,
ground, or voltage. However, they must be soldered to the PCB. Failure to follow this
guideline may result in part malfunction or damage to the device.
Power ground. Connect this pin to the ground electrode of the Input and output filter
capacitors.
LLM (Light Load Mode – “LLM”) pin. Logic-High enables automatic LLM/PWM and logic-
low places the device in fixed PWM operation. LLM pin should be connected to ENABLE,
or should be disabled before ENABLE is pulled low.
EP5357LUI: Feed back pin for external divider option.
EP5357HUI: No Connect
Sense pin for preset output voltages. Refer to application section for proper configuration.
2
October 11, 2013
www.altera.com/enpirion
Rev E