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EP5357XUI Datasheet, PDF (12/19 Pages) Altera Corporation – 600mA PowerSoC Synchronous Buck Regulator With Integrated Inductor
down. For applications with ENABLE control,
tie LLM to ENABLE; enable device after VIN
ramp up is complete and disable device before
VIN ramp down begins. For devices with
ENABLE and LLM tied to VIN, contact Power
Applications
support
for
specific
recommendations
Increased output filter capacitance and/or
increased bulk capacitance at the load will
decrease the magnitude of the LLM ripple.
Refer to the section on output filter capacitance
for maximum values of output filter capacitance
and the Soft-Start section for maximum bulk
capacitance at the load.
NOTE: For proper LLM operation the
EP5357xUI requires a minimum difference
between VIN and VOUT of 600mV. If this
condition is not met, the device cannot be
assured proper LLM operation.
NOTE: Automatic LLM/PWM is not available
when using the external resistor divider option
for VOUT programming.
Soft Start
Internal soft start circuits limit in-rush current
when the device starts up from a power down
condition or when the “ENABLE” pin is
asserted “high”. Digital control circuitry limits
the VOUT ramp rate to levels that are safe for
the Power MOSFETS and the integrated
inductor.
The EP5357HUI has a soft-start slew rate that
is twice that of the EP5357LUI.
When the EP5357LUI is configured in external
resistor divider mode, the device has a fixed
VOUT ramp time. Therefore, the ramp rate will
vary with the output voltage setting. Output
voltage ramp time is given in the Electrical
Characteristics Table.
Excess bulk capacitance on the output of the
device can cause an over-current condition at
startup. The maximum total capacitance on
the output, including the output filter capacitor
and bulk and decoupling capacitance, at the
load, is given as:
EP5357LUI:
COUT_TOTAL_MAX = COUT_Filter + COUT_BULK = 200uF
EP5357LUI/EP5357HUI
EP5357HUI:
COUT_TOTAL_MAX = COUT_Filter + COUT_BULK = 100uF
EP5357LUI in external divider mode:
COUT_TOTAL_MAX = 2.25x10-4/VOUT Farads
The nominal value for COUT is 10uF. See the
applications section for more details.
Over Current/Short Circuit Protection
The current limit function is achieved by
sensing the current flowing through a sense P-
MOSFET which is compared to a reference
current. When this level is exceeded the P-
FET is turned off and the N-FET is turned on,
pulling VOUT low. This condition is maintained
for approximately 0.5mS and then a normal
soft start is initiated. If the over current
condition still persists, this cycle will repeat.
Under Voltage Lockout
During initial power up an under voltage
lockout circuit will hold-off the switching
circuitry until the input voltage reaches a
sufficient level to insure proper operation. If
the voltage drops below the UVLO threshold
the lockout circuitry will again disable the
switching. Hysteresis is included to prevent
chattering between states.
Enable
The ENABLE pin provides a means to shut
down the converter or enable normal
operation. A logic low will disable the
converter and cause it to shut down. A logic
high will enable the converter into normal
operation.
NOTE: The ENABLE pin must not be left
floating.
Thermal Shutdown
When excessive power is dissipated in the
chip, the junction temperature rises. Once the
junction temperature exceeds the thermal
shutdown temperature the thermal shutdown
circuit turns off the converter output voltage
thus allowing the device to cool. When the
junction temperature decreases by 15C°, the
device will go through the normal startup
process.
03409
12
October 11, 2013
www.altera.com/enpirion
Rev E