EPC16UC88N Datasheet, PDF (16/36 Pages) Altera Corporation – Enhanced Configuration (EPC) Devices Datasheet

Page 16
Functional Description
Intel Flash-Based EPC Device Protection
In the absence of the lock bit protection feature in the EPC4, EPC8, and EPC16 devices
with Intel flash, Altera recommends four methods to protect the Intel Flash content in
EPC4, EPC8, and EPC16 devices. Any method alone is sufficient to protect the flash.
The methods are listed here in the order of descending protection level:
1. Using an RP# of less than 0.3 V on power-up and power-down for a minimum of
100 ns to a maximum 25 ms disables all control pins, making it impossible for a
write to occur.
2. Using V_PP < V_PPLK, where the maximum value of V_PPLK is 1 V, disables writes.
V_PP < V_PPLK means programming or writes cannot occur. V_PP is a programming
supply voltage input pin on the Intel flash. V_PP is equivalent to the VCCW pin on
EPC devices.
3. Using a high CE# disables the chip. The requirement for a write is a low CE# and
low WE#. A high CE# by itself prevents writes from occurring.
4. Using a high WE# prevent writes because a write only occurs when the WE# is low.
Performing all four methods simultaneously is the safest protection for the flash
content.
The following lists the ideal power-up sequence:
1. Power up V_CC.
2. Maintain V_PP < V_PPLK until V_CC is fully powered up.
3. Power up V_PP .
4. Drive RP# low during the entire power-up process. RP# must be released high
within 25 ms after V_PP is powered up.
1 CE# and WE# must be high for the entire power-up sequence.
The following lists the ideal power-down sequence:
1. Drive RP# low for 100 ns before power-down.
2. Power down V_PP < V_PPLK.
3. Power down V_CC.
4. Drive RP# low during the entire power-down process.
1 CE# and WE# must be high for the entire power-down sequence.
The RP# pin is not internally connected to the controller. Therefore, an external
loop-back connection between C-RP# and F-RP# must be made on the board even
when you are not using the external device to the RP# pin with the loop-back
connection. Always tri-state RP# when the flash is not in use.
Enhanced Configuration (EPC) Devices Datasheet
January 2012 Altera Corporation