EPC16UC88N Datasheet, PDF (15/36 Pages) Altera Corporation – Enhanced Configuration (EPC) Devices Datasheet

Functional Description
Page 15
Figure 4 shows an FPP configuration schematic with the external flash interface in
use.
Figure 4. FPP Configuration with External Flash Interface ⁽¹⁾
n
N.C.
VCC
VCC
Stratix Series
or
APEX II Device
MSEL
DCLK
DATA[7..0]
nSTATUS
CONF_DONE
nCONFIG
nCEO
nCE
GND
EPC Device
PLD or Processor
WE#C
RP#C
DCLK
WE#F
RP#F
DATA[7..0] A[20..0] (2)
OE
RY/BY# (5)
nCS
nINIT_CONF
CE#
OE#
DQ[15..0]
V_CC
WP#
BYTE# (3)
TM1
VCCW
PORSEL
PGM[2..0]
TMO
EXCLK
VCC(6)
(4)
(4)
(4)
WE#
RP#
A[20..0]
RY/BY#
CE#
OE#
DQ[15..0]
GND
C-A0 (3)
C-A1 (3)
C-A15 (3)
C-A16 (3)
A0-F
A1-F
A15-F
A16-F
Notes to Figure 4:
(1) For external flash interface support in the EPC8 device, contact Altera Applications 24/7 Technical Support.
(2) Pin A20 in EPC16 devices, pins A20 and A19 in EPC8 devices, and pins A20, A19, and A18 in EPC4 devices should be left floating. These pins
should not be connected to any signal as they are NC pins.
(3) In the 100-pin PQFP package, you must externally connect the following pins: C-A0 to F-A0, C-A1 to F-A1, C-A15 to F-A15, C-A16 to
F-A16, and BYTE# to V_CC. Additionally, you must make the following pin connections in both 100-pin PQFP and 88-pin UFBGA packages: C-RP#
to F-RP#, C-WE# to F-WE#, TM1 to V_CC, TM0 to GND, and WP# to V_CC.
(4) For PORSEL, PGM[], and EXCLK pin connections, refer to Table 10 on page 24.
(5) RY/BY# pin is only available for Sharp flash-based EPC8 and EPC16 devices.
(6) To protect Intel Flash based EPC devices content, isolate the V_CCW supply from V_CC. For more information, refer to “Intel Flash-Based EPC Device
Protection” on page 16.
January 2012 Altera Corporation
Enhanced Configuration (EPC) Devices Datasheet