5800 Datasheet, PDF (4/12 Pages) Allegro MicroSystems – BiMOS II LATCHED DRIVERS

5800 AND 5801
BiMOS II
LATCHED DRIVERS
UCN5801A
CLEAR 1
STROBE 2
IN ₁ 3
IN ₂ 4
IN ₃ 5
IN ₄ 6
IN ₅ 7
IN ₆ 8
IN ₇ 9
IN ₈ 10
GROUND 11
22
OUTPUT
ENABLE
V_DD 21 SUPPLY
20 OUT ₁
19 OUT₂
18 OUT₃
17 OUT₄
16 OUT ₅
15 OUT₆
14 OUT₇
13 OUT₈
12 COMMON
Dwg. PP-015
UCN5801LW
CLEAR 1
STROBE 2
IN₁ 3
IN ₂ 4
IN ₃ 5
IN ₄ 6
IN₅ 7
IN ₆ 8
IN ₇ 9
IN ₈ 10
GROUND 11
NO
CONNECTION
12
NC
24
OUTPUT
ENABLE
V_DD 23 SUPPLY
22 OUT₁
21 OUT₂
20 OUT ₃
19 OUT ₄
18 OUT₅
17 OUT₆
16 OUT ₇
15 OUT ₈
14 COMMON
NO
NC 13 _CONNECTION
Dwg. PP-015-1
CLEAR
F
STROBE
OUTPUT
ENABLE
INN
OUTN
A
CB
G
CB
D
E
A
C
B
G
E
TIMING CONDITIONS
(Logic Levels are V_DD and Ground)
Dwg. No. A-10,895A
A. Minimum Data Active Time Before Strobe Enabled
(Data Set-Up Time) .......................................................... 50 ns
B. Minimum Data Active Time After Strobe Disabled
(Data Hold Time) .............................................................. 50 ns
C. Minimum Strobe Pulse Width ..................................................125 ns
D. Typical Time Between Strobe Activation and
Output On to Off Transition ............................................500 ns
E. Minimum Time Between Strobe Activation and
Output Off to On Transition ............................................500 ns
F. Minimum Clear Pulse Width ....................................................300 ns
G. Minimum Data Pulse Width .....................................................225 ns
Information present at an input is transferred to its latch when the
STROBE is high. A high CLEAR input will set all latches to the output
OFF condition regardless of the data or STROBE input levels. A high
OUTPUT ENABLE will set all outputs to the OFF condition, regardless
of any other input conditions. When the OUTPUT ENABLE is low, the
outputs depend on the state of their respective latches.
IN_N
STROBE
0
1
1
1
X
X
X
X
X
0
X
0
X = irrelevant.
t-1 = previous output state.
t = present output state.
TRUTH TABLE
CLEAR
0
0
1
X
0
0
OUTPUT
ENABLE
0
0
X
1
0
0
OUT_N
t-1
t
X
X
X
X
ON
OFF
OFF
ON
OFF
OFF
ON
OFF
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