5800 Datasheet, PDF (3/12 Pages) Allegro MicroSystems – BiMOS II LATCHED DRIVERS

5800 AND 5801
BiMOS II
LATCHED DRIVERS
ELECTRICAL CHARACTERISTICS at T_A = +25°C, V_DD = 5 V (unless otherwise noted).
Characteristic
Symbol
Test Conditions
Limits
Min. Typ. Max.
Units
Output Leakage Current
I_CEX
V_CE = 50 V, T_A = +25°C
—
— 50
µA
V_CE = 50 V, T_A = +70°C
—
— 100
µA
Collector-Emitter
Saturation Voltage
V_CE(SAT)
I_C = 100 mA
I_C = 200 mA
— 0.9 1.1
V
— 1.1 1.3
V
I_C = 350 mA, V_DD = 7.0 V
— 1.3 1.6
V
Input Voltage
V_IN(0)
—
— 1.0
V
V_IN(1)
V_DD = 12 V
10.5 — —
V
V_DD = 10 V
8.5 — —
V
V_DD = 5.0 V (See Note)
3.5 — —
V
Input Resistance
r_IN
V_DD = 12 V
50 200 —
kΩ
V_DD = 10 V
50 300 —
kΩ
V_DD = 5.0 V
50 600 —
kΩ
Supply Current
I_DD(ON)
(Each
Stage)
V_DD = 12 V, Outputs Open
V_DD = 10 V, Outputs Open
V_DD = 5.0 V, Outputs Open
— 1.0 2.0
mA
— 0.9 1.7
mA
— 0.7 1.0
mA
I_DD(OFF)
V_DD = 12 V, Outputs Open, Inputs = 0 V
—
— 200
µA
(Total)
V_DD = 5.0 V, Outputs Open, Inputs = 0 V
—
50 100
µA
Clamp Diode
Leakage Current
I_R
V_R = 50 V, T_A = +25°C
V_R = 50 V, T_A = +70°C
—
— 50
µA
—
— 100
µA
Clamp Diode Forward Voltage
V_F
I_F = 350 mA
— 1.7 2.0
V
NOTE: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to ensure a minimum logic “1”.
UCN5801EP
(additional pinout diagrams
are on next page)
IN1 5
IN2 6
IN3 7
IN4 8
IN5 9
IN6 10
IN7 11
25 OUT₁
24 OUT₂
23 OUT₃
22 OUT₄
21 OUT₅
20 OUT₆
19 OUT₇
Dwg. PP-037