AK8180D Datasheet, PDF (9/12 Pages) Asahi Kasei Microsystems – 2.5V, 3.3V LVCMOS 1:10 Clock Fanout Buffer

Function Table
The following table shows the inputs/outputs clock state configured through the control pins.
AK8180D
Control Pin
DSELA
DSELB
DSELC
MR/OE
Table 1: Control-Pin-Setting Function Table
Default
0
0
QA0-2 = REFCLK x 1
1
QA0-2 = REFCLK x 1/2
0
QB0-2 = REFCLK x 1
QB0-2 = REFCLK x 1/2
0
QC0-3 = REFCLK x 1
QC0-3 = REFCLK x 1/2
Internal reset. Outputs disabled.
0
Output enabled
(High impedance)
MS1306-E-01
-9 -
Oct-2011