AK4125 Datasheet, PDF (9/26 Pages) Asahi Kasei Microsystems – 192kHz / 24Bit High Performance Asynchronous SRC

ASAHI KASEI
[AK4125]
εΠονϯάಛੑ
(Ta=25°C; AVDD, DVDD=3.0 ∼ 3.6V; C_L=20pF)
Parameter
Symbol
min
typ
max
Master Clock Timing
Frequency
fCLK
1.024
41.472
Pulse Width Low
tCLKL 0.4/fCLK
Pulse Width High
tCLKH 0.4/fCLK
LRCK for Input data (ILRCK)
Frequency
Duty Cycle
Slave Mode
Master Mode
fs
8
Duty
48
Duty
216
50
52
50
LRCK for Output data (OLRCK)
Frequency
Duty Cycle
Slave Mode
Master Mode
fs
8
Duty
48
Duty
216
50
52
50
Audio Interface Timing
Input PORT (Slave mode)
IBICK Period (8kHz ∼ 108kHz)
(108kHz ∼ 216kHz)
tBCK
tBCK
1/128fs
1/64fs
IBICK Pulse Width Low
tBCKL
27
Pulse Width High
tBCKH
27
ILRCK Edge to IBICK “↑”
(Note 7) tLRB
15
IBICK “↑” to ILRCK Edge
(Note 7) tBLR
15
SDTI Hold Time from IBICK “↑”
tSDH
15
SDTI Setup Time to IBICK “↑”
tSDS
15
Input PORT (Master mode)
IBICK Frequency
fBCK
64fs
IBICK Duty
IBICK “↓” to ILRCK
SDTI Hold Time from IBICK “↑”
SDTI Setup Time to IBICK “↑”
dBCK
50
tMBLR
−20
20
tSDH
15
tSDS
15
Output PORT (Slave mode)
OBICK Period (8kHz ∼ 108kHz)
(108kHz ∼ 216kHz)
tBCK
tBCK
1/128fs
1/64fs
OBICK Pulse Width Low
tBCKL
27
Pulse Width High
tBCKH
27
OLRCK Edge to OBICK “↑”
(Note 7) tLRB
20
OBICK “↑” to OLRCK Edge
(Note 7) tBLR
20
OLRCK to SDTO (MSB) (Except I²S mode) tLRS
20
OBICK “↓” to SDTO
tBSD
20
Output PORT (Master mode)
OBICK Frequency
fBCK
64fs
OBICK Duty
OBICK “↓” to OLRCK
OBICK “↓” to SDTO
dBCK
50
tMBLR
−20
20
tBSD
−20
20
Reset Timing
PDN Pulse Width
(Note 8) tPD
150
Note 7. ͜ͷ֨ن஋͸LRCKͷΤοδͱBICKͷ“↑”͕ॏͳΒͳ͍Α͏ʹنఆ͍ͯ͠·͢ɻ
Note 8. AK4125͸PDN pin = “L”ͰϦηοτ͞Ε·͢ɻ
Units
MHz
ns
ns
kHz
%
%
kHz
%
%
ns
ns
ns
ns
ns
ns
ns
ns
Hz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Hz
%
ns
ns
ns
MS0379-J-01
-9-
2005/05