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AK4125 Datasheet, PDF (17/26 Pages) Asahi Kasei Microsystems – 192kHz / 24Bit High Performance Asynchronous SRC
ASAHI KASEI
[AK4125]
„ σΟβճ࿏
AK4125͸σΟβճ࿏Λ಺ଂ͍ͯ͠·͢ɻσΟβճ࿏͸SRCϞʔυɺSRCόΠύεϞʔυʹؔ܎ͳ͘ɺDITHER
pinΛ“H”ʹ͢Δ͜ͱͰɺOBIT1-0 pinͰઃఆ͞Εͨग़ྗσʔλͷ࠷ԼҐϏοτʹσΟβΛՃ͑·͢ɻ
„ γεςϜϦηοτ
AK4125͸PDN pinΛ“L”ʹ͢Δ͜ͱͰύϫʔμ΢ϯͰ͖ɺ͜ͷ࣌ɺಉ࣌ʹ֤σΟδλϧϑΟϧλ͕Ϧηοτ͞
Ε·͢ɻPDN pin = “L”࣌ʹ͸SDTOग़ྗ͸“L”Ͱ͢ɻిݯ౤ೖ࣌ʹ͸PDN pinʹҰ౓“L”Λೖྗͯ͠Ϧηοτ͠
ͯԼ͍͞ɻΫϩοΫ౤ೖޙͷϦηοτղআΑΓσʔλग़ྗ͕ՄೳͱͳΔ࣌ؒ͸100msͰ͢ɻͦΕ·Ͱͷؒɺ“L”
Λग़ྗ͠·͢ɻ
Case 1
External clocks
(Input port) Don’t care
SDTI
Don’t care
External clocks
(Output port)
Don’t care
Input Clocks 1
Input Data 1
Output Clocks 1
Input Clocks 2
Input Data 2
Output Clocks 2
Don’t care
Don’t care
Don’t care
PDN
(Internal state) Power-down
< 100ms
PLL lock &
fs detection
Normal
operation
< 100ms
PD
PLL lock &
fs detection
Normal
operation
Power-down
SDTO
“0” data
Normal data
“0” data
Normal data “0” data
UNLOCK
Case 2
External clocks
(Input port)
SDTI
External clocks
(Output port)
PDN
(Internal state) Power-down
Figure 11. System Reset 1
(No Clock)
(Don’t care)
(Don’t care)
PLL Unlock
Input Clocks
Input Data
Output Clocks
Don’t care
Don’t care
Don’t care
< 100ms
PLL lock &
fs detection
Normal
operation
Power-down
SDTO
“0” data
Normal data “0” data
UNLOCK
Figure 12. System Reset 2
MS0379-J-01
- 17 -
2005/05