AK4125 Datasheet, PDF (19/26 Pages) Asahi Kasei Microsystems – 192kHz / 24Bit High Performance Asynchronous SRC

ASAHI KASEI
[AK4125]
„ PLL༻ϧʔϓϑΟϧλ

FILT pinʹ͸ɺ఍߅(R)ͱίϯσϯα(C1)Λ௚ྻʹ઀ଓͨ͠΋ͷͱɺίϯσϯα(C2)ΛฒྻʹAVSSʹରͯ͠઀
ଓ͠·͢(Figure 14, Table 6, 7ࢀর)ɻFILT pinʹ͸ϊΠζ͕ͷΒͳ͍Α͏஫ҙ͍ͯͩ͘͠͞ɻIBICKʹϩοΫΛ
͔͚ΔϞʔυͰ͸ɺ֎෇͚ૉࢠͷ஋͸IBICKೖྗप೾਺ʹ͸ґଘ͠·ͤΜɻ
AK4125
FILT
R
C2
C1
AVSS
Figure 14. PLL Loop Filter
[ೖྗϙʔτ͕εϨʔϒϞʔυͷ৔߹]
1. ILRCKʹPLLͷϩοΫΛ͔͚Δ৔߹
PLL2
L
L
L
PLL1
L
L
H
PLL0
ILRCK
R [Ω]
C1 [µF]
L
8k ∼ 96kHz
1.8k ± 5%
0.68 ± 30%
H
8k ∼ 216kHz
16k ∼ 216kHz
1k ± 5%
1.5k ± 5%
1.0 ± 30%
0.68 ± 30%
L
8k ∼ 216kHz
16k ∼ 216kHz
1k ± 5%
1.5k ± 5%
1.0 ± 30%
0.68 ± 30%
Table 6. PLL Loop Filter (ILRCK Mode)
C2 [nF]
0.68 ± 30%
2.2 ± 30%
0.68 ± 30%
2.2 ± 30%
0.68 ± 30%
- Note. 16kHz ∼ 216kHzͷϞʔυͰ͸ɺίϯσϯα(C1, C2)ͷ༰ྔΛখ͘͢͞Δ͜ͱ͕Ͱ͖·͢ɻ
2. IBICKʹPLLͷϩοΫΛ͔͚Δ৔߹
PLL2
H
PLL1
*
PLL0
ILRCK
R [Ω]
C1 [µF]
*
8k ∼ 216kHz 470 ± 5%
0.22 ± 30%
Table 7. PLL Loop Filter (IBICK Mode, *: Don’t care)
C2 [nF]
1.0 ± 30%
Note. IBICK͸ɺΫϩοΫ੾ସ࣌Ҏ֎͸ৗʹ࿈ଓͯͯ͠͠څڙԼ͍͞ɻ
Note. IBICK = 32fsi͸16bit LSB justifiedͱ16bit I²S CompatibleͷΈରԠ͠·͢ɻ
[ೖྗϙʔτ͕ϚελϞʔυͷ৔߹]
1. IMCLKΛ256fs, 384fs, 512fs, 768fsͰ࢖༻͢Δ৔߹͸ɺ֎෇͚ૉࢠ͸ඞཁ͋Γ·ͤΜɻ
2. IMCLKΛ128fs·ͨ͸192fsͰ࢖༻͢Δ৔߹͸ɺTable 7ͷ֎෇͚ૉࢠ͕ඞཁʹͳΓ·͢ɻ
MS0379-J-01
- 19 -
2005/05