AK2365 Datasheet, PDF (9/31 Pages) Asahi Kasei Microsystems – dPMR Filterless IF LSI

[AK2365]
9. Digital AC Timing
1) Serial Interface Timing
AK2365 is connected to a CPU by three-wired interface through CSN, SCLK and SDATA pins, which
can make reading and writing data for control registers.
Serial data named SDATA is consist of 1-bit read and write instruction(R/W), 6-bit address (A5 to A0)
and 8-bit data(D7 to D0) in one frame.
Write mode
CSN
SCLK
SDATA
(Input)
SDATA
(Output)
Read mode
CSN
SCLK
SDATA
(Input)
SDATA
R/W A5 A4 A3 A2 A1 A0
Hi-Z
D7 D6 D5 D4 D3 D2 D1 D0
R/W A5 A4 A3 A2 A1 A0
Hi-Z
Hi-Z
D7 D6 D5 D4 D3 D2 D1 D0
R/W : Instruction bit controls to write data to AK2365 or read back from it.
When set to low, AK2365 is in write mode. When set to high,
AK2365 is in read mode.
A5 to A0: Register address to be accessed.
D7 to D0: Write or read date to be accessed.
<1> CSN(Chip select) is normally selected high for disable.
When CSN is set to low, serial interface becomes active.
<2> In write mode, instruction, address and data input from SDATA pin are synchronized and
latched with the rising edge of 16 iterations of SCLK clock. Set to low between address A0 and
data D7.Input data is fixed synchronized with the rising edge of 16th clock. Note that if CSN
become “H” before 16th clock, setting data becomes invalid. During the period when CSN is
set to “L”, consecutive writing is available.
<3> In read mode, instruction and address are synchronized and latched with the rising edge of 7
iterations of SCLK clock. And the register data are output from SDATA pin synchronized with
the falling edge of 9 iterations of SCLK clock. The data between address A0 and data D7 is
unstable. During the period when data is output, input to SDATA must be “Hi-z”. Set CSN to
“H” once reading is completed because consecutive reading is not valid.
MS1453-E-01
-9-
2012/10