AK2365 Datasheet, PDF (10/31 Pages) Asahi Kasei Microsystems – dPMR Filterless IF LSI

[AK2365]
2) Detail Timing Chart
Write mode
CSN
SCLK
SDATA
(Input)
SDATA
(Output)
Read mode
CSN
t_CSS
t_WH
t_DS
R/W
t_DH
A5
A4
High-Z
t_CSS
SCLK
t_WL
A3
A0
t_SD
t_CSLH
t_CSHH
D7
D6
D1 D0
t_CSLH
t_CD
t_DD
SDATA
(Input)
R/W A5
A4
A1 A0
SDATA
(Output)
High-Z
Rising and falling time
High-Z
D7 D6
D1 D0
t_R
t_F
SCLK
VIH
VIL
Parameter
Symbol Condition Min. Typ. Max. Unit
CSN setup time
t_CSS
100
SDATA setup time
t_DS
100
SDATA hold time
t_DH
100
SCLK high time
t_WH
500
SCLK low time
t_WL
500
CSN low hold time
t_CSLH
100
CSN high hold time
t_CSHH
100
SDATA Hi-Z setup time
t_SD
500
SCLK to SDATA output delay
time
t_DD
20pF load
CSN to SDATA input delay time
t_CD
20pF load 200
SCLK rising time
t_R
SCLK falling time
t_F
ns
ns
ns
ns
ns
ns
ns
ns
400
ns
ns
250
ns
250
ns
Note) Digital input and output timing is relative to 0.5DVDD of rising signal and falling signal.
MS1453-E-01
- 10 -
2012/10