AK4254 Datasheet, PDF (7/22 Pages) Asahi Kasei Microsystems – Capacitor-less Video Amp with 7:2 Video Switch

ASAHI KASEI
[AK4254]
SWITCHING CHARACTERISTICS
(Ta =-40∼85°C; AVDD=CVDD1=CVDD2=2.7V∼3.6V; C_L = 20pF)
Parameter
Symbol
Min
typ
max
Units
Control Interface Timing (3-wire Serial mode)
PDN “↑” to CSN “↓”
tPDCS
150
ns
CCLK Period
tCCK
200
ns
CCLK Pulse Width Low
tCCKL
80
ns
Pulse Width High
tCCKH
80
ns
CDTI Setup Time
tCDS
40
ns
CDTI Hold Time
tCDH
40
ns
CSN “H” Time
tCSW
150
ns
CSN “↓” to CCLK “↑”
tCSS
50
ns
CCLK “↑” to CSN “↑”
tCSH
50
ns
Control Interface Timing (I²C Bus mode):
SCL Clock Frequency
PDN “↑” to SDA “↓” @SCL = “H”
Bus Free Time Between Transmissions
Start Condition Hold Time
fSCL
-
tPDSD
1.3
tBUF
1.3
tHD:STA
0.6
400
kHz
-
μs
-
μs
-
μs
(Prior to first clock pulse)
Clock Low Time
tLOW
1.3
Clock High Time
tHIGH
0.6
Setup Time for Repeated Start Condition
tSU:STA
0.6
SDA Hold Time from SCL Falling (Note: 10) tHD:DAT
0
SDA Setup Time from SCL Rising
tSU:DAT
0.1
Rise Time of Both SDA and SCL Lines
tR
-
Fall Time of Both SDA and SCL Lines
tF
-
Setup Time for Stop Condition
tSU:STO
0.6
-
μs
-
μs
-
μs
-
μs
-
μs
0.3
μs
0.3
μs
-
μs
Pulse Width of Spike Noise
Suppressed by Input Filter
tSP
0
50
ns
Capacitive load on bus
Cb
-
400
pF
Reset Timing
PDN Pulse Width
(Note: 11)
tPD
150
ns
Note: 10. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Note: 11. In Serial Control Mode (P/S pin= “L”), it is recommended that the AK4254 is powered up at the PDN pin=“L”.
In Parallel Control Mode, resetting by the PDN pin = “L” is not needed when power up.
Note: 12. I²C is a registered trademark of Philips Semiconductors.
MS0586-E-01
-7-
2007/08