AK4254 Datasheet, PDF (13/22 Pages) Asahi Kasei Microsystems – Capacitor-less Video Amp with 7:2 Video Switch

ASAHI KASEI
[AK4254]
AK4254
75Ω
VOUT1
(VOUT2)
75Ω
0V
Figure 4. Video Signal Output
■ Serial Interface
The AK4254 can select 3-wire Serial mode (I2C pin = “L”) or I²C Bus mode (I2C pin =“H”).
1.3-wire Serial mode (I2C pin = “L”)
Internal registers may be written by using the 3-wire µP interface pins (CSN, CCLK and CDTI pins). The data on this
interface consists of a 2-bit Chip address (C1 and C2 are set by CAD1, CAD0pin), Read/Write (Fixed to “1”), Register
address (MSB first, 5bits) and Control data (MSB first, 8bits). If the Chip address matches the setting of the CAD1 pin
and CAD0pin, the AK4254 operation is executed. Each bit is clocked in on the rising edge (“↑”) of CCLK. Address and
data are latched on the 16th CCLK rising edge (“↑”) after CSN falling edge (“↓”). CSN should be set to “H” once after 16
CCLKs for each address. Clock speed of CCLK is 5MHz (max). The value of internal registers are initialized by the PDN
pin = “L”.
CSN
CCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CDTI
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1,C0:
R/W:
A4-A0:
D7-D0:
Chip Address: (C1= CAD1, C0 = CAD0)
READ/WRITE (Fixed to “1”: WRITE)
Register Address
Control Data
Figure 5. 3-wire Serial mode I/F timing
MS0586-E-01
- 13 -
2007/08